arch/all-pc/hidds/pcipc/pci.h

   1 /*
   2     Copyright © 1995-2018, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #ifndef _PCI_H
   7 #define _PCI_H
   8
   9 #include <exec/types.h>
  10 #include <exec/libraries.h>
  11 #include <exec/execbase.h>
  12 #include <exec/nodes.h>
  13 #include <exec/lists.h>
  14
  15 #include <dos/bptr.h>
  16
  17 #include <oop/oop.h>
  18
  19 #include <aros/arossupportbase.h>
  20 #include <exec/execbase.h>
  21
  22 #include <libraries/acpica.h>
  23
  24 #include LC_LIBDEFS_FILE
  25
  26 #ifdef __i386__
  27 /*
  28  * On i386 we can support very old Pentium-1 motherboards with PCI
  29  * configuration mechanism 2.
  30  * x86-64 is much more legacy-free...
  31  */
  32 #define LEGACY_SUPPORT
  33 #endif
  34
  35
  36 struct pcipc_staticdata
  37 {
  38     OOP_AttrBase        hiddPCIDriverAB;
  39     OOP_AttrBase        hiddAB;
  40
  41     OOP_AttrBase        hidd_PCIDeviceAB;
  42
  43     OOP_Class           *driverClass;
  44
  45     /* Low-level sub-methods */
  46     ULONG               (*ReadConfigLong)(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg);
  47     void                (*WriteConfigLong)(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, ULONG val);
  48
  49     /* ACPI related */
  50     ACPI_TABLE_MCFG     *pcipc_acpiMcfgTbl;
  51     struct MinList      pcipc_irqRoutingTable;
  52 };
  53
  54 struct pcibase
  55 {
  56     struct Library          LibNode;
  57     struct pcipc_staticdata   psd;
  58 };
  59
  60 #define BASE(lib) ((struct pcibase*)(lib))
  61 #define PSD(cl) (&((struct pcibase*)cl->UserData)->psd)
  62 #define _psd PSD(cl)
  63
  64 /* PCI configuration mechanism 1 registers */
  65 #define PCI_AddressPort 0x0cf8
  66 #define PCI_DataPort    0x0cfc
  67
  68 /*
  69  * PCI configuration mechanism 2 registers
  70  * This mechanism is obsolete long ago. But AROS runs on old hardware,
  71  * and we support this.
  72  */
  73 #define PCI_CSEPort     0x0cf8
  74 #define PCI_ForwardPort 0x0cfa
  75
  76 /*
  77  * PCI configuration mechanism selector register.
  78  * Supported by some transition-time chipsets, like Intel Neptune.
  79  */
  80 #define PCI_MechSelect  0x0cfb
  81
  82 #define PCICS_PRODUCT   0x02
  83
  84 #define PCIBR_SUBCLASS  0x0a
  85 #define PCIBR_SECBUS    0x19
  86
  87
  88 typedef union _pcicfg
  89 {
  90     ULONG   ul;
  91     UWORD   uw[2];
  92     UBYTE   ub[4];
  93 } pcicfg;
  94
  95 static inline UWORD ReadConfigWord(struct pcipc_staticdata *psd, UBYTE bus,
  96     UBYTE dev, UBYTE sub, UWORD reg)
  97 {
  98     pcicfg temp;
  99
 100     temp.ul = psd->ReadConfigLong(bus, dev, sub, reg);
 101     return temp.uw[(reg&2)>>1];
 102 }
 103
 104 static inline UWORD ReadConfigByte(struct pcipc_staticdata *psd, UBYTE bus,
 105     UBYTE dev, UBYTE sub, UWORD reg)
 106 {
 107     pcicfg temp;
 108
 109     temp.ul = psd->ReadConfigLong(bus, dev, sub, reg);
 110     return temp.ub[reg & 3];
 111 }
 112
 113 ULONG ReadConfig1Long(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg);
 114 void WriteConfig1Long(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, ULONG val);
 115
 116 #ifdef LEGACY_SUPPORT
 117
 118 void PCIPC_ProbeConfMech(struct pcipc_staticdata *psd);
 119
 120 #else
 121
 122 #define PCIPC_ProbeConfMech(x)
 123
 124 #endif
 125
 126 #endif /* _PCI_H */