atari.v

   1 // Atosm Chip
   2 // Copyright (C) 2008 Tomasz Malesinski <tmal@mimuw.edu.pl>
   3 //
   4 // This program is free software; you can redistribute it and/or modify
   5 // it under the terms of the GNU General Public License as published by
   6 // the Free Software Foundation; either version 2 of the License, or
   7 // (at your option) any later version.
   8 //
   9 // This program is distributed in the hope that it will be useful,
  10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 // GNU General Public License for more details.
  13 //
  14 // You should have received a copy of the GNU General Public License
  15 // along with this program; if not, write to the Free Software
  16 // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  17
  18 `include "cpu6502.v"
  19 `include "memory.v"
  20 `include "antic.v"
  21 `include "gtia.v"
  22 `include "pia.v"
  23 `include "pokey.v"
  24
  25 // Clock:
  26 // clk2: 01010101
  27 // clk:  00110011
  28
  29 module atari(clk_i, clk2_i, rst_i,
  30              key_code, key_pressed,
  31              key_shift, key_break,
  32              key_start, key_select, key_option,
  33              joystick, trig);
  34    input clk_i;
  35    input clk2_i;
  36    input rst_i;
  37    input key_code, key_pressed;
  38    input key_shift, key_break;
  39    input key_start, key_select, key_option;
  40    input joystick, trig;
  41
  42    wire  clk_i;
  43    wire  clk2_i;
  44    wire  rst_i;
  45    wire [7:0] key_code;
  46    wire       key_pressed;
  47    wire       key_shift, key_break;
  48    wire       key_start, key_select, key_option;
  49    wire [7:0] joystick;
  50    wire [1:0] trig;
  51
  52    wire  nmi, irq;
  53
  54    wire [7:0] portb;
  55
  56    wire [2:0] antic_out;
  57    wire [7:0] color;
  58    wire       hsync, vsync;
  59
  60    wire [7:0] gtia_dmadat_i;
  61    wire [3:0] consol_out;
  62
  63    // Common interconnect signals.
  64    reg [15:0] adr;
  65    reg [7:0]  slavedat_o;
  66    reg [7:0]  masterdat_o;
  67    reg        stb;
  68    reg        we;
  69    wire       ack;
  70    wire       cyc;
  71
  72    // Masters outputs.
  73    wire [15:0] cpuadr_o, anticadr_o;
  74    wire [7:0]  cpudat_o;
  75    wire        cpustb_o, anticstb_o;
  76    wire        cpuwe_o;
  77    wire        cpucyc_o, anticcyc_o;
  78
  79    // Outputs from address decoder.
  80    reg         ramsel, romsel, bassel;
  81    reg         anticsel, gtiasel, pokeysel, piasel;
  82    reg         dummysel;
  83
  84    // Outputs from arbiter.
  85    wire        cpugnt, anticgnt;
  86
  87    // Slaves STB_I signals.
  88    wire        ramstb, romstb, basstb;
  89    wire        anticstb_i, gtiastb, pokeystb, piastb;
  90    wire        dummystb;
  91
  92    // Slaves DAT_O signals.
  93    wire [7:0]  ramdat_o, romdat_o, basdat_o;
  94    wire [7:0]  anticdat_o, gtiadat_o, pokeydat_o, piadat_o;
  95
  96    // Slaves ACK_O signals.
  97    wire        ramack_o, romack_o, basack_o;
  98    wire        anticack_o, gtiaack_o, pokeyack_o, piaack_o;
  99
 100    // Masters ACK_I signals.
 101    wire        cpuack_i, anticack_i;
 102
 103    // Arbiter.
 104    // TODO: should it be synchronous?
 105    assign      cpugnt = cpucyc_o && !anticcyc_o;
 106    assign      anticgnt = anticcyc_o;
 107    assign      cyc = cpucyc_o | anticcyc_o;
 108
 109    // Masters outputs multiplexer.
 110    always @ (cpuadr_o or cpudat_o or cpuwe_o or cpustb_o or
 111              anticadr_o or anticstb_o or
 112              cpugnt or anticgnt) begin
 113       if (anticgnt) begin
 114          adr = anticadr_o;
 115          masterdat_o = 0;
 116          we = 0;
 117          stb = anticstb_o;
 118       end else begin
 119          adr = cpuadr_o;
 120          masterdat_o = cpudat_o;
 121          we = cpuwe_o;
 122          stb = cpustb_o;
 123       end
 124    end
 125
 126    // Address decoder.
 127    always @ (adr or portb) begin
 128       ramsel = 0;
 129       romsel = 0;
 130       bassel = 0;
 131       anticsel = 0;
 132       gtiasel = 0;
 133       pokeysel = 0;
 134       piasel = 0;
 135       anticsel = 0;
 136       dummysel = 0;
 137       if (adr[15:7] == {'h50, 1'b1} && !portb[7])
 138         romsel = 1;
 139       else if (adr[15:8] >= 'ha0 && adr[15:8] < 'hc0 && !portb[1])
 140         bassel = 1;
 141       else if (adr[15:8] == 'hd0)
 142         gtiasel = 1;
 143       else if (adr[15:8] == 'hd2)
 144         pokeysel = 1;
 145       else if (adr[15:8] == 'hd3)
 146         piasel = 1;
 147       else if (adr[15:8] == 'hd4)
 148         anticsel = 1;
 149       else if (adr[15:8] == 'hd1 || adr[15:8] == 'hd5 || adr[15:8] == 'hd6 ||
 150                adr[15:8] == 'hd7)
 151         dummysel = 1;
 152       else if (adr[15:8] >= 'hc0 && portb[0])
 153         romsel = 1;
 154       else
 155         ramsel = 1;
 156    end
 157
 158    // Slaves STB_I.
 159    assign ramstb = ramsel & cyc & stb;
 160    assign romstb = romsel & cyc & stb;
 161    assign basstb = bassel & cyc & stb;
 162    assign anticstb_i = anticsel & cyc & stb;
 163    assign gtiastb = gtiasel & cyc & stb;
 164    assign pokeystb = pokeysel & cyc & stb;
 165    assign piastb = piasel & cyc & stb;
 166    assign dummystb = dummysel & cyc & stb;
 167
 168    // Or'd slaves ACK_O.
 169    assign ack = ramack_o | romack_o | basack_o | anticack_o | gtiaack_o |
 170                 pokeyack_o | piaack_o | dummystb;
 171
 172    // Slaves DAT_O multiplexer.
 173    always @ (ramsel or ramdat_o or
 174              romsel or romdat_o or
 175              bassel or basdat_o or
 176              anticsel or anticdat_o or
 177              gtiasel or gtiadat_o or
 178              pokeysel or pokeydat_o or
 179              piasel or piadat_o)
 180      if (ramsel)
 181        slavedat_o = ramdat_o;
 182      else if (romsel)
 183        slavedat_o = romdat_o;
 184      else if (bassel)
 185        slavedat_o = basdat_o;
 186      else if (anticsel)
 187        slavedat_o = anticdat_o;
 188      else if (gtiasel)
 189        slavedat_o = gtiadat_o;
 190      else if (pokeysel)
 191        slavedat_o = pokeydat_o;
 192      else if (piasel)
 193        slavedat_o = piadat_o;
 194      else
 195        slavedat_o = 'hff;
 196
 197    // Masters ACK_I signals.
 198    assign anticack_i = ack & anticgnt;
 199    assign cpuack_i = ack & cpugnt;
 200
 201    defparam    u_ram.size = 'h10000;
 202    defparam    u_ram.adrbits = 16;
 203
 204    ram u_ram(.clk_i(clk_i),
 205              .adr_i(adr),
 206              .dat_i(cpudat_o),
 207              .rst_i(rst_i),
 208              .stb_i(ramstb),
 209              .we_i(we),
 210              .ack_o(ramack_o),
 211              .dat_o(ramdat_o));
 212
 213    defparam    u_rom.size = 'h4000;
 214    defparam    u_rom.adrbits = 14;
 215
 216    rom u_rom(.clk_i(clk_i),
 217              .adr_i(adr[13:0]),
 218              .rst_i(rst_i),
 219              .stb_i(romstb),
 220              .ack_o(romack_o),
 221              .dat_o(romdat_o));
 222
 223    defparam    u_basic_rom.size = 'h2000;
 224    defparam    u_basic_rom.adrbits = 13;
 225
 226    rom u_basic_rom(.clk_i(clk_i),
 227                    .adr_i(adr[12:0]),
 228                    .rst_i(rst_i),
 229                    .stb_i(basstb),
 230                    .ack_o(basack_o),
 231                    .dat_o(basdat_o));
 232
 233    cpu6502 u_cpu(.clk_i(clk_i),
 234                  .adr_o(cpuadr_o),
 235                  .dat_i(slavedat_o),
 236                  .rst_i(rst_i),
 237                  .stb_o(cpustb_o),
 238                  .we_o(cpuwe_o),
 239                  .ack_i(cpuack_i),
 240                  .dat_o(cpudat_o),
 241                  .cyc_o(cpucyc_o),
 242                  .nmi(nmi),
 243                  .irq(irq));
 244
 245    antic u_antic(.clk_i(clk_i),
 246                  .adr_i(adr[3:0]),
 247                  .adr_o(anticadr_o),
 248                  .slavedat_i(cpudat_o),
 249                  .masterdat_i(slavedat_o),
 250                  .rst_i(rst_i),
 251                  .stb_i(anticstb_i),
 252                  .stb_o(anticstb_o),
 253                  .we_i(we),
 254                  .ack_i(anticack_i),
 255                  .ack_o(anticack_o),
 256                  .dat_o(anticdat_o),
 257                  .cyc_o(anticcyc_o),
 258                  .clk2_i(clk2_i),
 259                  .nmi(nmi),
 260                  .antic_out(antic_out));
 261
 262    assign      gtia_dmadat_i = we ? masterdat_o : slavedat_o;
 263
 264    gtia u_gtia(.clk_i(clk_i),
 265                .adr_i(adr[4:0]),
 266                .dat_i(cpudat_o),
 267                .rst_i(rst_i),
 268                .stb_i(gtiastb),
 269                .we_i(we),
 270                .ack_o(gtiaack_o),
 271                .dat_o(gtiadat_o),
 272                .clk2_i(clk2_i),
 273                .dmadat_i(gtia_dmadat_i),
 274                .antic_out(antic_out),
 275                .color(color),
 276                .hsync(hsync),
 277                .vsync(vsync),
 278                // trig[3] = 0 - no cartridge
 279                .trig_in({2'b0, ~trig}),
 280                .consol_in({1'b0, ~key_start, ~key_select, ~key_option}),
 281                .consol_out(consol_out));
 282
 283    pia u_pia(.clk_i(clk_i),
 284              .adr_i(adr[1:0]),
 285              .dat_i(cpudat_o),
 286              .rst_i(rst_i),
 287              .stb_i(piastb),
 288              .we_i(we),
 289              .ack_o(piaack_o),
 290              .dat_o(piadat_o),
 291              .pa_i(~joystick),
 292              .pb_o(portb));
 293
 294    pokey u_pokey(.clk_i(clk_i),
 295                  .adr_i(adr[3:0]),
 296                  .dat_i(cpudat_o),
 297                  .rst_i(rst_i),
 298                  .stb_i(pokeystb),
 299                  .we_i(we),
 300                  .ack_o(pokeyack_o),
 301                  .dat_o(pokeydat_o),
 302                  .irq(irq),
 303                  .key_code(key_code), .key_pressed(key_pressed),
 304                  .key_shift(key_shift), .key_break(key_break));
 305
 306 endmodule