telegraf: 1.27.0 -> 1.27.1
[NixPkgs.git] / lib / systems / architectures.nix
blob11668ae59a71aecb61905f758d6d65d11b2ce58b
1 { lib }:
3 rec {
4   # gcc.arch to its features (as in /proc/cpuinfo)
5   features = {
6     default        = [ ];
7     # x86_64 Intel
8     westmere       = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes"                                    ];
9     sandybridge    = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx"                              ];
10     ivybridge      = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx"                              ];
11     haswell        = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2"          "fma"        ];
12     broadwell      = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2"          "fma"        ];
13     skylake        = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2"          "fma"        ];
14     skylake-avx512 = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2" "avx512" "fma"        ];
15     cannonlake     = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2" "avx512" "fma"        ];
16     icelake-client = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2" "avx512" "fma"        ];
17     icelake-server = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2" "avx512" "fma"        ];
18     cascadelake    = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2" "avx512" "fma"        ];
19     cooperlake     = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2" "avx512" "fma"        ];
20     tigerlake      = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2" "avx512" "fma"        ];
21     alderlake      = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx" "avx2"          "fma"        ];
22     # x86_64 AMD
23     btver1         = [ "sse3" "ssse3" "sse4_1" "sse4_2"                                                  ];
24     btver2         = [ "sse3" "ssse3" "sse4_1" "sse4_2"         "aes" "avx"                              ];
25     bdver1         = [ "sse3" "ssse3" "sse4_1" "sse4_2" "sse4a" "aes" "avx"                 "fma" "fma4" ];
26     bdver2         = [ "sse3" "ssse3" "sse4_1" "sse4_2" "sse4a" "aes" "avx"                 "fma" "fma4" ];
27     bdver3         = [ "sse3" "ssse3" "sse4_1" "sse4_2" "sse4a" "aes" "avx"                 "fma" "fma4" ];
28     bdver4         = [ "sse3" "ssse3" "sse4_1" "sse4_2" "sse4a" "aes" "avx" "avx2"          "fma" "fma4" ];
29     znver1         = [ "sse3" "ssse3" "sse4_1" "sse4_2" "sse4a" "aes" "avx" "avx2"          "fma"        ];
30     znver2         = [ "sse3" "ssse3" "sse4_1" "sse4_2" "sse4a" "aes" "avx" "avx2"          "fma"        ];
31     znver3         = [ "sse3" "ssse3" "sse4_1" "sse4_2" "sse4a" "aes" "avx" "avx2"          "fma"        ];
32     znver4         = [ "sse3" "ssse3" "sse4_1" "sse4_2" "sse4a" "aes" "avx" "avx2" "avx512" "fma"        ];
33     # other
34     armv5te        = [ ];
35     armv6          = [ ];
36     armv7-a        = [ ];
37     armv8-a        = [ ];
38     mips32         = [ ];
39     loongson2f     = [ ];
40   };
42   # a superior CPU has all the features of an inferior and is able to build and test code for it
43   inferiors = {
44     # x86_64 Intel
45     # https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html
46     default        = [ ];
47     westmere       = [ ];
48     sandybridge    = [ "westmere"       ] ++ inferiors.westmere;
49     ivybridge      = [ "sandybridge"    ] ++ inferiors.sandybridge;
50     haswell        = [ "ivybridge"      ] ++ inferiors.ivybridge;
51     broadwell      = [ "haswell"        ] ++ inferiors.haswell;
52     skylake        = [ "broadwell"      ] ++ inferiors.broadwell;
53     skylake-avx512 = [ "skylake"        ] ++ inferiors.skylake;
54     cannonlake     = [ "skylake-avx512" ] ++ inferiors.skylake-avx512;
55     icelake-client = [ "cannonlake"     ] ++ inferiors.cannonlake;
56     icelake-server = [ "icelake-client" ] ++ inferiors.icelake-client;
57     cascadelake    = [ "skylake-avx512" ] ++ inferiors.cannonlake;
58     cooperlake     = [ "cascadelake"    ] ++ inferiors.cascadelake;
59     tigerlake      = [ "icelake-server" ] ++ inferiors.icelake-server;
60     # CX16 does not exist on alderlake, while it does on nearly all other intel CPUs
61     alderlake      = [ ];
63     # x86_64 AMD
64     # TODO: fill this (need testing)
65     btver1         = [ ];
66     btver2         = [ ];
67     bdver1         = [ ];
68     bdver2         = [ ];
69     bdver3         = [ ];
70     bdver4         = [ ];
71     # Regarding `skylake` as inferior of `znver1`, there are reports of
72     # successful usage by Gentoo users and Phoronix benchmarking of different
73     # `-march` targets.
74     #
75     # The GCC documentation on extensions used and wikichip documentation
76     # regarding supperted extensions on znver1 and skylake was used to create
77     # this partial order.
78     #
79     # Note:
80     #
81     # - The successors of `skylake` (`cannonlake`, `icelake`, etc) use `avx512`
82     #   which no current AMD Zen michroarch support.
83     # - `znver1` uses `ABM`, `CLZERO`, `CX16`, `MWAITX`, and `SSE4A` which no
84     #   current Intel microarch support.
85     #
86     # https://www.phoronix.com/scan.php?page=article&item=amd-znver3-gcc11&num=1
87     # https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html
88     # https://en.wikichip.org/wiki/amd/microarchitectures/zen
89     # https://en.wikichip.org/wiki/intel/microarchitectures/skylake
90     znver1         = [ "skylake" ] ++ inferiors.skylake;
91     znver2         = [ "znver1"  ] ++ inferiors.znver1;
92     znver3         = [ "znver2"  ] ++ inferiors.znver2;
93     znver4         = [ "znver3"  ] ++ inferiors.znver3;
95     # other
96     armv5te        = [ ];
97     armv6          = [ ];
98     armv7-a        = [ ];
99     armv8-a        = [ ];
100     mips32         = [ ];
101     loongson2f     = [ ];
102   };
104   predicates = let
105     featureSupport = feature: x: builtins.elem feature features.${x} or [];
106   in {
107     sse3Support    = featureSupport "sse3";
108     ssse3Support   = featureSupport "ssse3";
109     sse4_1Support  = featureSupport "sse4_1";
110     sse4_2Support  = featureSupport "sse4_2";
111     sse4_aSupport  = featureSupport "sse4a";
112     avxSupport     = featureSupport "avx";
113     avx2Support    = featureSupport "avx2";
114     avx512Support  = featureSupport "avx512";
115     aesSupport     = featureSupport "aes";
116     fmaSupport     = featureSupport "fma";
117     fma4Support    = featureSupport "fma4";
118   };