armsrc/fpgaloader.h

   1 //-----------------------------------------------------------------------------
   2 // Jonathan Westhues, April 2006
   3 // iZsh <izsh at fail0verflow.com>, 2014
   4 //
   5 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
   6 // at your option, any later version. See the LICENSE.txt file for the text of
   7 // the license.
   8 //-----------------------------------------------------------------------------
   9 // Routines to load the FPGA image, and then to configure the FPGA's major
  10 // mode once it is configured.
  11 //-----------------------------------------------------------------------------
  12 #ifndef __FPGALOADER_H
  13 #define __FPGALOADER_H
  14
  15 #include "common.h"
  16
  17 #define FpgaDisableSscDma(void) AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
  18 #define FpgaEnableSscDma(void) AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;
  19
  20 // definitions for multiple FPGA config files support
  21 #define FPGA_BITSTREAM_LF 1
  22 #define FPGA_BITSTREAM_HF 2
  23 #define FPGA_BITSTREAM_HF_FELICA 3
  24
  25 /*
  26   Communication between ARM / FPGA is done inside armsrc/fpgaloader.c (function FpgaSendCommand)
  27   Send 16 bit command / data pair to FPGA
  28   The bit format is: C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
  29   where
  30     C is 4bit command
  31     D is 12bit data
  32
  33 -----+--------- frame layout --------------------
  34 bit  |    15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
  35 -----+-------------------------------------------
  36 cmd  |     x  x  x  x
  37 major|                          x x x
  38 opt  |                                      x x
  39 divi |                          x x x x x x x x
  40 thres|                          x x x x x x x x
  41 -----+-------------------------------------------
  42 */
  43
  44 // Definitions for the FPGA commands.
  45 // BOTH HF / LF
  46 #define FPGA_CMD_SET_CONFREG                        (1<<12) // C
  47
  48 // LF
  49 #define FPGA_CMD_SET_DIVISOR                        (2<<12) // C
  50 #define FPGA_CMD_SET_USER_BYTE1                     (3<<12) // C
  51
  52 // HF
  53 #define FPGA_CMD_TRACE_ENABLE                       (2<<12) // C
  54
  55 // Definitions for the FPGA configuration word.
  56 #define FPGA_MAJOR_MODE_MASK                        0x01C0
  57 #define FPGA_MINOR_MODE_MASK                        0x003F
  58
  59 // LF
  60 #define FPGA_MAJOR_MODE_LF_READER                   (0<<6)
  61 #define FPGA_MAJOR_MODE_LF_EDGE_DETECT              (1<<6)
  62 #define FPGA_MAJOR_MODE_LF_PASSTHRU                 (2<<6)
  63 #define FPGA_MAJOR_MODE_LF_ADC                      (3<<6)
  64
  65 // HF
  66 #define FPGA_MAJOR_MODE_HF_READER                   (0<<6) // D
  67 #define FPGA_MAJOR_MODE_HF_SIMULATOR                (1<<6) // D
  68 #define FPGA_MAJOR_MODE_HF_ISO14443A                (2<<6) // D
  69 #define FPGA_MAJOR_MODE_HF_SNIFF                    (3<<6) // D
  70 #define FPGA_MAJOR_MODE_HF_ISO18092                 (4<<6) // D
  71 #define FPGA_MAJOR_MODE_HF_GET_TRACE                (5<<6) // D
  72
  73 // BOTH HF / LF
  74 #define FPGA_MAJOR_MODE_OFF                         (7<<6) // D
  75
  76
  77 // Options for LF_READER
  78 #define FPGA_LF_ADC_READER_FIELD                    0x1
  79
  80 // Options for LF_EDGE_DETECT
  81 #define FPGA_CMD_SET_EDGE_DETECT_THRESHOLD          FPGA_CMD_SET_USER_BYTE1
  82 #define FPGA_LF_EDGE_DETECT_READER_FIELD            0x1
  83 #define FPGA_LF_EDGE_DETECT_TOGGLE_MODE             0x2
  84
  85 // Options for the HF reader
  86 #define FPGA_HF_READER_MODE_RECEIVE_IQ              (0<<0)
  87 #define FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE       (1<<0)
  88 #define FPGA_HF_READER_MODE_RECEIVE_PHASE           (2<<0)
  89 #define FPGA_HF_READER_MODE_SEND_FULL_MOD           (3<<0)
  90 #define FPGA_HF_READER_MODE_SEND_SHALLOW_MOD        (4<<0)
  91 #define FPGA_HF_READER_MODE_SNIFF_IQ                (5<<0)
  92 #define FPGA_HF_READER_MODE_SNIFF_AMPLITUDE         (6<<0)
  93 #define FPGA_HF_READER_MODE_SNIFF_PHASE             (7<<0)
  94 #define FPGA_HF_READER_MODE_SEND_JAM                (8<<0)
  95
  96 #define FPGA_HF_READER_SUBCARRIER_848_KHZ           (0<<4)
  97 #define FPGA_HF_READER_SUBCARRIER_424_KHZ           (1<<4)
  98 #define FPGA_HF_READER_SUBCARRIER_212_KHZ           (2<<4)
  99
 100 // Options for the HF simulated tag, how to modulate
 101 #define FPGA_HF_SIMULATOR_NO_MODULATION             0x0 // 0000
 102 #define FPGA_HF_SIMULATOR_MODULATE_BPSK             0x1 // 0001
 103 #define FPGA_HF_SIMULATOR_MODULATE_212K             0x2 // 0010
 104 #define FPGA_HF_SIMULATOR_MODULATE_424K             0x4 // 0100
 105 #define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT        0x5 // 0101
 106 //  no 848K
 107
 108 // Options for ISO14443A
 109 #define FPGA_HF_ISO14443A_SNIFFER                   0x0
 110 #define FPGA_HF_ISO14443A_TAGSIM_LISTEN             0x1
 111 #define FPGA_HF_ISO14443A_TAGSIM_MOD                0x2
 112 #define FPGA_HF_ISO14443A_READER_LISTEN             0x3
 113 #define FPGA_HF_ISO14443A_READER_MOD                0x4
 114
 115 //options for Felica.
 116 #define FPGA_HF_ISO18092_FLAG_NOMOD                 0x1 // 0001 disable modulation module
 117 #define FPGA_HF_ISO18092_FLAG_424K                  0x2 // 0010 should enable 414k mode (untested). No autodetect
 118 #define FPGA_HF_ISO18092_FLAG_READER                0x4 // 0100 enables antenna power, to act as a reader instead of tag
 119
 120 void FpgaSendCommand(uint16_t cmd, uint16_t v);
 121 void FpgaWriteConfWord(uint16_t v);
 122 void FpgaEnableTracing(void);
 123 void FpgaDisableTracing(void);
 124 void FpgaDownloadAndGo(int bitstream_version);
 125 // void FpgaGatherVersion(int bitstream_version, char *dst, int len);
 126 void FpgaSetupSsc(uint16_t fpga_mode);
 127 void SetupSpi(int mode);
 128 bool FpgaSetupSscDma(uint8_t *buf, uint16_t len);
 129 void Fpga_print_status(void);
 130 int FpgaGetCurrent(void);
 131 void SetAdcMuxFor(uint32_t whichGpio);
 132
 133 // extern and generel turn off the antenna method
 134 void switch_off(void);
 135
 136 #endif