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updated on Thu Jan 19 00:16:31 UTC 2012
[aur-mirror.git] / bsvc / bsvc-2.1.patch
blob8cafaa27488bb4ecdb96ebbdee8c07725326e50c
1 diff -ur bsvc-2.1/src/Assemblers/68kasm/codegen.c bsvc-2.1-fixed/src/Assemblers/68kasm/codegen.c
2 --- bsvc-2.1/src/Assemblers/68kasm/codegen.c 1998-11-09 04:39:28.000000000 +0100
3 +++ bsvc-2.1-fixed/src/Assemblers/68kasm/codegen.c 2007-05-30 22:47:40.000000000 +0200
4 @@ -70,7 +70,7 @@
5 case BYTE : printf("Output: Byte %02X put into output stream at location %08X\n", data, loc); break;
6 case WORD : printf("Output: Word %04X put into output stream at location %08X\n", data, loc); break;
7 case LONG : printf("Output: Longword %08X put into output stream at location %08X\n", data, loc); break;
8 - default : printf("OUTPUT: INVALID SIZE CODE!\n"); exit();
9 + default : printf("OUTPUT: INVALID SIZE CODE!\n"); exit(1);
10 } */
11 if (listFlag)
12 listObj(data, size);
13 @@ -168,6 +168,6 @@
14 loc += 4;
15 }
16 break;
17 - default : printf("INVALID EFFECTIVE ADDRESSING MODE!\n"); exit();
18 + default : printf("INVALID EFFECTIVE ADDRESSING MODE!\n"); exit(1);
19 }
20 }
21 diff -ur bsvc-2.1/src/Assemblers/68kasm/listing.c bsvc-2.1-fixed/src/Assemblers/68kasm/listing.c
22 --- bsvc-2.1/src/Assemblers/68kasm/listing.c 1998-11-09 04:39:28.000000000 +0100
23 +++ bsvc-2.1-fixed/src/Assemblers/68kasm/listing.c 2007-05-30 22:47:40.000000000 +0200
24 @@ -81,7 +81,7 @@
25 listFile = fopen(name, "w");
26 if (!listFile) {
27 puts("Can't open listing file");
28 - exit();
29 + exit(1);
30 }
31 }
32
33 @@ -96,7 +96,7 @@
34 putc('\n', listFile);
35 if (ferror(listFile)) {
36 fputs("Error writing to listing file\n", stderr);
37 - exit();
38 + exit(1);
39 }
40 }
41
42 @@ -131,6 +131,6 @@
43 case LONG : sprintf(listPtr, "%08X ", data);
44 listPtr += 9;
45 break;
46 - default : printf("LISTOBJ: INVALID SIZE CODE!\n"); exit();
47 + default : printf("LISTOBJ: INVALID SIZE CODE!\n"); exit(1);
48 }
49 }
50 diff -ur bsvc-2.1/src/Assemblers/68kasm/main.c bsvc-2.1-fixed/src/Assemblers/68kasm/main.c
51 --- bsvc-2.1/src/Assemblers/68kasm/main.c 1998-11-09 04:39:28.000000000 +0100
52 +++ bsvc-2.1-fixed/src/Assemblers/68kasm/main.c 2007-05-30 22:47:40.000000000 +0200
53 @@ -71,7 +71,7 @@
54 if (!inFile)
55 {
56 fputs("Couldn't create temporary file\n", stderr);
57 - exit();
58 + exit(1);
59 }
60
61 strcpy(fileName, argv[i]);
62 @@ -79,13 +79,13 @@
63
64 if (!srcFile) {
65 fputs("Input file not found\n", stderr);
66 - exit();
67 + exit(1);
68 }
69
70 error = buildCompleteSourceFile(srcFile, fileName, inFile, 1);
71 if (error) {
72 fputs(error, stderr);
73 - exit();
74 + exit(1);
75 }
76
77 /* Rewind the in file to the beginning */
78 @@ -302,6 +302,6 @@
79 puts(" -l Produce listing file (infile.lis)");
80 puts(" -n Produce NO object file (infile.h68)");
81 puts(" -a Produce long word absolute addresses only (infile.h68)");
82 - exit();
83 + exit(1);
84 }
85
86 diff -ur bsvc-2.1/src/Assemblers/68kasm/object.c bsvc-2.1-fixed/src/Assemblers/68kasm/object.c
87 --- bsvc-2.1/src/Assemblers/68kasm/object.c 1998-11-09 04:39:28.000000000 +0100
88 +++ bsvc-2.1-fixed/src/Assemblers/68kasm/object.c 2007-05-30 22:47:40.000000000 +0200
89 @@ -78,7 +78,7 @@
90 objFile = fopen(name, "w");
91 if (!objFile) {
92 puts("Can't open object file");
93 - exit();
94 + exit(1);
95 }
96 /* Output S-record file header */
97 /* fputs("Here comes an S-record...\n", objFile); */
98 @@ -133,7 +133,7 @@
99 byteCount += 4;
100 checksum += checkValue(data);
101 break;
102 - default : printf("outputObj: INVALID SIZE CODE!\n"); exit();
103 + default : printf("outputObj: INVALID SIZE CODE!\n"); exit(1);
104 }
105 objPtr += size*2;
106 objAddr += size;
107 @@ -165,7 +165,7 @@
108 fputs(sRecord, objFile);
109 if (ferror(objFile)) {
110 fputs(objErrorMsg, stderr);
111 - exit();
112 + exit(1);
113 }
114 }
115
116 @@ -180,7 +180,7 @@
117 fputs("S9030000FC\n", objFile);
118 if (ferror(objFile)) {
119 fputs(objErrorMsg, stderr);
120 - exit();
121 + exit(1);
122 }
123 fclose(objFile);
124 }
125 diff -ur bsvc-2.1/src/Framework/AddressSpace.hxx bsvc-2.1-fixed/src/Framework/AddressSpace.hxx
126 --- bsvc-2.1/src/Framework/AddressSpace.hxx 1998-11-09 04:39:28.000000000 +0100
127 +++ bsvc-2.1-fixed/src/Framework/AddressSpace.hxx 2007-05-30 22:47:40.000000000 +0200
128 @@ -26,9 +26,7 @@
129 #include <list>
130 #include <string>
131
132 -#ifdef USE_STD
133 - using namespace std;
134 -#endif
135 +using namespace std;
136
137 class AddressSpace;
138 class BasicDevice;
139 diff -ur bsvc-2.1/src/Framework/BasicDevice.hxx bsvc-2.1-fixed/src/Framework/BasicDevice.hxx
140 --- bsvc-2.1/src/Framework/BasicDevice.hxx 1998-11-09 04:39:28.000000000 +0100
141 +++ bsvc-2.1-fixed/src/Framework/BasicDevice.hxx 2007-05-30 22:47:40.000000000 +0200
142 @@ -20,11 +20,9 @@
143 #ifndef BASICDEVICE_HXX
144 #define BASICDEVICE_HXX
145
146 -#include <string>
147 +#include <cstring>
148
149 -#ifdef USE_STD
150 - using namespace std;
151 -#endif
152 +using namespace std;
153
154 class BasicDevice;
155 class BasicCPU;
156 diff -ur bsvc-2.1/src/Framework/BasicDeviceRegistry.hxx bsvc-2.1-fixed/src/Framework/BasicDeviceRegistry.hxx
157 --- bsvc-2.1/src/Framework/BasicDeviceRegistry.hxx 1998-11-09 04:39:28.000000000 +0100
158 +++ bsvc-2.1-fixed/src/Framework/BasicDeviceRegistry.hxx 2007-05-30 22:47:40.000000000 +0200
159 @@ -20,9 +20,7 @@
160
161 #include <string>
162
163 -#ifdef USE_STD
164 - using namespace std;
165 -#endif
166 +using namespace std;
167
168 class BasicCPU;
169 class BasicDevice;
170 diff -ur bsvc-2.1/src/Framework/BreakpointList.hxx bsvc-2.1-fixed/src/Framework/BreakpointList.hxx
171 --- bsvc-2.1/src/Framework/BreakpointList.hxx 1998-11-09 04:39:28.000000000 +0100
172 +++ bsvc-2.1-fixed/src/Framework/BreakpointList.hxx 2007-05-30 22:47:40.000000000 +0200
173 @@ -19,9 +19,7 @@
174
175 #include <set>
176
177 -#ifdef USE_STD
178 - using namespace std;
179 -#endif
180 +using namespace std;
181
182 class BreakpointList {
183 private:
184 diff -ur bsvc-2.1/src/Framework/Interface.cxx bsvc-2.1-fixed/src/Framework/Interface.cxx
185 --- bsvc-2.1/src/Framework/Interface.cxx 1998-11-09 04:39:28.000000000 +0100
186 +++ bsvc-2.1-fixed/src/Framework/Interface.cxx 2007-05-30 22:47:40.000000000 +0200
187 @@ -31,14 +31,12 @@
188 #include <sys/types.h>
189 #include <unistd.h>
190
191 - #include <iostream.h>
192 - #include <strstream.h>
193 + #include <iostream>
194 + #include <strstream>
195 #include <string>
196 #endif
197
198 -#ifdef USE_STD
199 - using namespace std;
200 -#endif
201 +using namespace std;
202
203 #include "Interface.hxx"
204 #include "BasicCPU.hxx"
205 diff -ur bsvc-2.1/src/Framework/Interface.hxx bsvc-2.1-fixed/src/Framework/Interface.hxx
206 --- bsvc-2.1/src/Framework/Interface.hxx 1998-11-09 04:39:28.000000000 +0100
207 +++ bsvc-2.1-fixed/src/Framework/Interface.hxx 2007-05-30 22:47:40.000000000 +0200
208 @@ -18,15 +18,9 @@
209 #ifndef INTERFACE_HXX
210 #define INTERFACE_HXX
211
212 -#ifdef WIN32
213 - #include <iostream>
214 -#else
215 - #include <iostream.h>
216 -#endif
217 +#include <iostream>
218
219 -#ifdef USE_STD
220 - using namespace std;
221 -#endif
222 +using namespace std;
223
224 class BasicCPU;
225 class BasicDeviceRegistry;
226 diff -ur bsvc-2.1/src/Framework/Tools.hxx bsvc-2.1-fixed/src/Framework/Tools.hxx
227 --- bsvc-2.1/src/Framework/Tools.hxx 1998-11-09 04:39:28.000000000 +0100
228 +++ bsvc-2.1-fixed/src/Framework/Tools.hxx 2007-05-30 22:47:40.000000000 +0200
229 @@ -19,9 +19,7 @@
230
231 #include <string>
232
233 -#ifdef USE_STD
234 - using namespace std;
235 -#endif
236 +using namespace std;
237
238 ///////////////////////////////////////////////////////////////////////////////
239 // Convert the hex string to an unsigned integer
240 diff -ur bsvc-2.1/src/Makefile.common bsvc-2.1-fixed/src/Makefile.common
241 --- bsvc-2.1/src/Makefile.common 1998-11-09 04:39:28.000000000 +0100
242 +++ bsvc-2.1-fixed/src/Makefile.common 2007-05-30 22:48:16.000000000 +0200
243 @@ -12,7 +12,7 @@
244 ###############################################################################
245
246 ## Base Directory of the BSVC distribution
247 -PROJECT_BASE = /home/bwmott/projects/bsvc/development/bsvc
248 +PROJECT_BASE = /usr/src/bsvc/src/bsvc-2.1
249
250 ## Directory to install the BSVC system
251 INSTALL_DIR = $(PROJECT_BASE)/bin
252 diff -ur bsvc-2.1/src/Tools/xtermpipe/xtermpipe.cxx bsvc-2.1-fixed/src/Tools/xtermpipe/xtermpipe.cxx
253 --- bsvc-2.1/src/Tools/xtermpipe/xtermpipe.cxx 1998-11-09 04:39:28.000000000 +0100
254 +++ bsvc-2.1-fixed/src/Tools/xtermpipe/xtermpipe.cxx 2007-05-30 22:47:40.000000000 +0200
255 @@ -14,6 +14,8 @@
256 #include <stdio.h>
257 #include <signal.h>
258
259 +using namespace std;
260 +
261 int WaitForIO(int pipe_id)
262 {
263 fd_set readfds;
264 @@ -31,7 +33,7 @@
265 select(pipe_id + 1, (int*)&readfds, (int*)&writefds, (int*)&exceptfds,
266 (void*)0);
267 # else
268 - select(pipe_id + 1, &readfds, &writefds, &exceptfds, (void*)0);
269 + select(pipe_id + 1, &readfds, &writefds, &exceptfds, (timeval*)0);
270 # endif
271
272 if(FD_ISSET(0, &readfds))
273 @@ -40,7 +42,7 @@
274 return(1);
275 }
276
277 -main()
278 +int main()
279 {
280 int read_id, write_id;
281
282 diff -ur bsvc-2.1/src/sim68000/cpu/Makefile bsvc-2.1-fixed/src/sim68000/cpu/Makefile
283 --- bsvc-2.1/src/sim68000/cpu/Makefile 1998-11-09 04:39:28.000000000 +0100
284 +++ bsvc-2.1-fixed/src/sim68000/cpu/Makefile 2007-05-30 22:47:40.000000000 +0200
285 @@ -28,7 +28,7 @@
286 $(CC) $(INCLUDES) -o instruction instruction.c
287
288 m68000DecodeTable.hxx: instruction instruction.list
289 - $(PROJECT_BASE)/src/sim68000/cpu/instruction
290 + ./instruction
291
292 clean:
293 rm -f *.o $(LIBRARY) instruction
294 diff -ur bsvc-2.1/src/sim68000/cpu/exec.cxx bsvc-2.1-fixed/src/sim68000/cpu/exec.cxx
295 --- bsvc-2.1/src/sim68000/cpu/exec.cxx 1998-11-09 04:39:28.000000000 +0100
296 +++ bsvc-2.1-fixed/src/sim68000/cpu/exec.cxx 2007-05-30 22:47:40.000000000 +0200
297 @@ -15,13 +15,11 @@
298
299 #include <string>
300
301 -#ifdef USE_STD
302 - using namespace std;
303 -#endif
304 +using namespace std;
305
306 -#include "AddressSpace.hxx"
307 +#include "../../Framework/AddressSpace.hxx"
308 #include "m68000.hxx"
309 -#include "Tools.hxx"
310 +#include "../../Framework/Tools.hxx"
311
312 ///////////////////////////////////////////////////////////////////////////////
313 // Compute the effective address, given the mode and register bits
314 diff -ur bsvc-2.1/src/sim68000/cpu/m68000.cxx bsvc-2.1-fixed/src/sim68000/cpu/m68000.cxx
315 --- bsvc-2.1/src/sim68000/cpu/m68000.cxx 1998-11-09 04:39:28.000000000 +0100
316 +++ bsvc-2.1-fixed/src/sim68000/cpu/m68000.cxx 2007-05-30 22:47:40.000000000 +0200
317 @@ -13,11 +13,11 @@
318 // $Id: m68000.cxx,v 1.1 1996/08/02 14:59:18 bwmott Exp $
319 ///////////////////////////////////////////////////////////////////////////////
320
321 -#include "Tools.hxx"
322 +#include "../../Framework/Tools.hxx"
323 #include "m68000.hxx"
324 -#include "BasicDevice.hxx"
325 -#include "RegInfo.hxx"
326 -#include "AddressSpace.hxx"
327 +#include "../../Framework/BasicDevice.hxx"
328 +#include "../../Framework/RegInfo.hxx"
329 +#include "../../Framework/AddressSpace.hxx"
330
331 // Array of information about each register
332 m68000::RegisterData m68000::ourRegisterData[] = {
333 diff -ur bsvc-2.1/src/sim68000/cpu/m68000.hxx bsvc-2.1-fixed/src/sim68000/cpu/m68000.hxx
334 --- bsvc-2.1/src/sim68000/cpu/m68000.hxx 1998-11-09 04:39:28.000000000 +0100
335 +++ bsvc-2.1-fixed/src/sim68000/cpu/m68000.hxx 2007-05-30 22:47:40.000000000 +0200
336 @@ -18,19 +18,13 @@
337
338 #include <string>
339
340 -#ifdef WIN32
341 - #include <iostream>
342 -#else
343 - #include <iostream.h>
344 -#endif
345 +#include <iostream>
346
347 -#ifdef USE_STD
348 - using namespace std;
349 -#endif
350 +using namespace std;
351
352 class BasicDevice;
353
354 -#include "BasicCPU.hxx"
355 +#include "../../Framework/BasicCPU.hxx"
356
357 // Instruction Size Constants
358 #define BYTE 0
359 diff -ur bsvc-2.1/src/sim68000/devices/DeviceRegistry.hxx bsvc-2.1-fixed/src/sim68000/devices/DeviceRegistry.hxx
360 --- bsvc-2.1/src/sim68000/devices/DeviceRegistry.hxx 1998-11-09 04:39:28.000000000 +0100
361 +++ bsvc-2.1-fixed/src/sim68000/devices/DeviceRegistry.hxx 2007-05-30 22:47:40.000000000 +0200
362 @@ -17,7 +17,7 @@
363 #ifndef DEVICEREGISTRY_HXX
364 #define DEVICEREGISTRY_HXX
365
366 -#include "BasicDeviceRegistry.hxx"
367 +#include "../../Framework/BasicDeviceRegistry.hxx"
368
369 ///////////////////////////////////////////////////////////////////////////////
370 // The DeviceRegistry Class
371 diff -ur bsvc-2.1/src/sim68000/devices/M68681.cxx bsvc-2.1-fixed/src/sim68000/devices/M68681.cxx
372 --- bsvc-2.1/src/sim68000/devices/M68681.cxx 1998-11-09 04:39:28.000000000 +0100
373 +++ bsvc-2.1-fixed/src/sim68000/devices/M68681.cxx 2007-05-30 22:47:40.000000000 +0200
374 @@ -13,8 +13,8 @@
375 // $Id: M68681.cxx,v 1.1 1996/08/02 15:01:10 bwmott Exp $
376 ///////////////////////////////////////////////////////////////////////////////
377
378 -#include <iostream.h>
379 -#include <strstream.h>
380 +#include <iostream>
381 +#include <strstream>
382 #include <string>
383
384 #include <sys/types.h>
385 @@ -22,7 +22,7 @@
386 #include <fcntl.h>
387 #include <signal.h>
388
389 -#include "BasicCPU.hxx"
390 +#include "../../Framework/BasicCPU.hxx"
391 #include "M68681.hxx"
392
393 // Callback types
394 diff -ur bsvc-2.1/src/sim68000/devices/M68681.hxx bsvc-2.1-fixed/src/sim68000/devices/M68681.hxx
395 --- bsvc-2.1/src/sim68000/devices/M68681.hxx 1998-11-09 04:39:28.000000000 +0100
396 +++ bsvc-2.1-fixed/src/sim68000/devices/M68681.hxx 2007-05-30 22:47:40.000000000 +0200
397 @@ -19,7 +19,9 @@
398 #include <string>
399 #include <sys/types.h>
400
401 -#include "BasicDevice.hxx"
402 +using namespace std;
403 +
404 +#include "../../Framework/BasicDevice.hxx"
405
406 class M68681 : public BasicDevice {
407 public:
408 diff -ur bsvc-2.1/src/sim68000/devices/RAM.cxx bsvc-2.1-fixed/src/sim68000/devices/RAM.cxx
409 --- bsvc-2.1/src/sim68000/devices/RAM.cxx 1998-11-09 04:39:28.000000000 +0100
410 +++ bsvc-2.1-fixed/src/sim68000/devices/RAM.cxx 2007-05-30 22:47:40.000000000 +0200
411 @@ -13,20 +13,13 @@
412 // $Id: RAM.cxx,v 1.1 1996/08/02 15:02:49 bwmott Exp $
413 ///////////////////////////////////////////////////////////////////////////////
414
415 -#ifdef WIN32
416 - #include <iostream>
417 - #include <strstream>
418 -#else
419 - #include <iostream.h>
420 - #include <strstream.h>
421 -#endif
422 -
423 -#ifdef USE_STD
424 - using namespace std;
425 -#endif
426 +#include <iostream>
427 +#include <strstream>
428
429 -#include "Tools.hxx"
430 -#include "BasicCPU.hxx"
431 +using namespace std;
432 +
433 +#include "../../Framework/Tools.hxx"
434 +#include "../../Framework/BasicCPU.hxx"
435 #include "RAM.hxx"
436
437 ///////////////////////////////////////////////////////////////////////////////
438 diff -ur bsvc-2.1/src/sim68000/devices/RAM.hxx bsvc-2.1-fixed/src/sim68000/devices/RAM.hxx
439 --- bsvc-2.1/src/sim68000/devices/RAM.hxx 1998-11-09 04:39:28.000000000 +0100
440 +++ bsvc-2.1-fixed/src/sim68000/devices/RAM.hxx 2007-05-30 22:47:40.000000000 +0200
441 @@ -18,11 +18,9 @@
442
443 #include <string>
444
445 -#ifdef USE_STD
446 - using namespace std;
447 -#endif
448 +using namespace std;
449
450 -#include "BasicDevice.hxx"
451 +#include "../../Framework/BasicDevice.hxx"
452
453 class RAM : public BasicDevice {
454 public:
455 diff -ur bsvc-2.1/src/sim68000/devices/Timer.cxx bsvc-2.1-fixed/src/sim68000/devices/Timer.cxx
456 --- bsvc-2.1/src/sim68000/devices/Timer.cxx 1998-11-09 04:39:28.000000000 +0100
457 +++ bsvc-2.1-fixed/src/sim68000/devices/Timer.cxx 2007-05-30 22:47:40.000000000 +0200
458 @@ -1,366 +1,358 @@
459 -///////////////////////////////////////////////////////////////////////////////
460 -//
461 -// Timer.cxx
462 -//
463 -// This class keeps up with a list of all of the availible devices and
464 -// allocates them. It's dervied from the BasicDeviceRegistry
465 -//
466 -// FILENAME: Timer.cxx
467 -// DESC: Simulates an timer for the M68000 CPU. Thus giving
468 -// the Simulator the ablility to simulate a timmer intrurpt.
469 -// Programmers can impliment time slicing with this timmer.
470 -//
471 -// Contains Register and Offsets for the timer.
472 -//
473 -// CREATE: 7-17-98
474 -// OWNER: Xavier Plasencia
475 -// ORG: SDSU
476 -// DEPEN: This file requiers the Event hander and the BasicDevice files.
477 -//
478 -///////////////////////////////////////////////////////////////////////////////
479 -// $Id: $
480 -///////////////////////////////////////////////////////////////////////////////
481 -
482 -#ifdef WIN32
483 - #include <iostream>
484 - #include <strstream>
485 - #include <cstring>
486 -#else
487 - #include <iostream.h>
488 - #include <strstream.h>
489 - #include <string.h>
490 -#endif
491 -
492 -#ifdef USE_STD
493 - using namespace std;
494 -#endif
495 -
496 -#include "BasicCPU.hxx"
497 -#include "Timer.hxx"
498 -
499 -///////////////////////////////////////////////////////////////////////////////
500 -// Constructor
501 -///////////////////////////////////////////////////////////////////////////////
502 -Timer::Timer(const string& args, BasicCPU& cpu)
503 - : BasicDevice("Timer", args, cpu)
504 -{
505 - istrstream in((char*)args.data(), args.size());
506 - string keyword, equals;
507 - unsigned long base;
508 - unsigned long irq;
509 -
510 - firstTime = true;
511 - // Scan "BaseAddress = nnnn"
512 - // This is important for the CPU to know what address space
513 - // is used by the device.
514 - in >> keyword >> equals >> hex >> base;
515 - if((!in) || (keyword != "BaseAddress") || (equals != "="))
516 - {
517 - ErrorMessage("Invalid initialization arguments!");
518 - return;
519 - }
520 -
521 - in >> keyword >> equals >> hex >> irq;
522 - if((!in) || (keyword != "IRQ") || (equals != "="))
523 - {
524 - ErrorMessage("Invalid initialization arguments!");
525 - return;
526 - }
527 -
528 -/*
529 - I've hardcoded the cycles setting to 2000 which should provide the
530 - 125000 ticks per second for the PI/T
531 -
532 - unsigned long timer_cycle;
533 - in >> keyword >> equals >> hex >> timer_cycle;
534 - if((!in) || (keyword != "CycleSec") || (equals != "="))
535 - {
536 - ErrorMessage("Invalid initialization arguments!");
537 - return;
538 - }
539 - Timer::TIMER_CPU_CYCLE = timer_cycle;
540 -*/
541 -
542 - Timer::TIMER_IRQ = irq;
543 - Timer::TIMER_CPU_CYCLE = 2000;
544 - baseAddress = base * cpu.Granularity();
545 -
546 - // This is needed to start the whole process. The eventhandler
547 - // will always request an event and test to see if the user has
548 - // enabled the timer it not nothing happens but if so. The
549 - // CPR register is copied to the CNTR and is decremented for every
550 - // Cycle.
551 - (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
552 -
553 - Reset();
554 -}
555 -
556 -///////////////////////////////////////////////////////////////////////////////
557 -// This routine should set myInterruptPending flag and send a request
558 -// to the CPU for an interrupt.
559 -///////////////////////////////////////////////////////////////////////////////
560 -void Timer::InterruptRequest(int level)
561 -{
562 - // If no interrupt is pending then request one
563 - if(!myInterruptPending)
564 - {
565 - myInterruptPending = true;
566 - myCPU.InterruptRequest(this, level);
567 - }
568 -}
569 -
570 -/*___________________________________________________________________________
571 - | FUNCTIONAME: InterruptAcknowledge(int)
572 - | DESC: This routine is called by the CPU when it processes a
573 - | requested interrupt. It should return the vector number associated with
574 - | the interrupt or AUTOVECTOR_INTERRUPT if the device doesn't generate
575 - | vectors. This default routine only does autovector interrupts.
576 - | This function is called by the CPU. The return value is usally the
577 - | memory location of a exemption funcion. How to handel these functions
578 - | one shold refer to a Motorla text book.
579 - | PARAM: None
580 - | NOTE: Vecotor codes 5 and 7 are the only masks that will make the timer
581 - | do somthing. 5 is a VECTOR and 7 is an AUTOVECTOR. The code
582 - | can be found in any manual.
583 - |___________________________________________________________________________
584 -*/
585 -long Timer::InterruptAcknowledge(int)
586 -{
587 - unsigned char cTCR = timerValue[TCR];
588 -
589 - if(myInterruptPending)
590 - {
591 - switch(cTCR>>5)
592 - {
593 - case 5:
594 - //By returning the address of the vector, the cpu will
595 - //call the vector that is located in the right mem location.
596 - myInterruptPending = false;
597 - return timerValue[TIVR];
598 - break;
599 -
600 - case 7:
601 - myInterruptPending = false;
602 - return AUTOVECTOR_INTERRUPT;
603 - break;
604 -
605 - default:
606 - return SPURIOUS_INTERRUPT;
607 - }
608 - }
609 - else
610 - {
611 - return(SPURIOUS_INTERRUPT);
612 - }
613 -}
614 -
615 -/*______________________________________________________________
616 - | METHOD: Timer::CheckMapped( unsigned long adress)
617 - | DESC: Check to see if address mapps to device.
618 - |______________________________________________________________
619 -*/
620 -bool Timer::CheckMapped(unsigned long address) const
621 -{
622 - return ((address >= baseAddress ) &&
623 - (address <= baseAddress+(22*sizeof(char))));
624 -}
625 -
626 -/*______________________________________________________________
627 - | METHOD: Timer::Peek(unsigned long address)
628 - | DESC: Returns a byte from the device's address.
629 - |
630 - | PEEK is the protocal that is used by the device to
631 - | inform the CPU what the registry settings are.
632 - | The use need not update the memory location for the CPU
633 - | All of this is done by the cpu and thus uses peek to
634 - | read the data that the device is using for the Memory
635 - | (i.e. RAM)
636 - |______________________________________________________________
637 -*/
638 -unsigned char Timer::Peek(unsigned long address)
639 -{
640 - switch((address-baseAddress))
641 - {
642 - case TCR:
643 - return timerValue[TCR];
644 - case TIVR:
645 - return timerValue[TIVR];
646 - case NULR:
647 - return timerValue[NULR];
648 - case CPRH:
649 - return timerValue[CPRH];
650 - case CPRM:
651 - return timerValue[CPRM];
652 - case CPRL:
653 - return timerValue[CPRL];
654 - case CNTRH:
655 - return timerValue[CNTRH];
656 - case CNTRM:
657 - return timerValue[CNTRM];
658 - case CNTRL:
659 - return timerValue[CNTRL];
660 - case TSR:
661 - return timerValue[TSR];
662 - }
663 - return 0; //Error not a valid address.
664 -}
665 -
666 -/*______________________________________________________________
667 - | METHOD: Timer::Poke(unsigned long address, char c)
668 - | DESC: This is the interface to the rest of the World. Here
669 - | the CPU or anyother devece writes to memory and updates the
670 - | device. Poke Changes the value of the registers.
671 - | Notice that there is no way for the user to WRITE to the
672 - | registers CNTR, this is because they are read only.
673 - |______________________________________________________________
674 -*/
675 -void Timer::Poke(unsigned long address, unsigned char c)
676 -{
677 - switch((address-baseAddress))
678 - {
679 - case TCR:
680 - timerValue[TCR]=c;
681 - break;
682 - case TIVR:
683 - timerValue[TIVR]=c;
684 - break;
685 - case NULR:
686 - timerValue[NULR]=c;
687 - break;
688 - case CPRH:
689 - timerValue[CPRH]=c;
690 - break;
691 - case CPRM:
692 - timerValue[CPRM]=c;
693 - break;
694 - case CPRL:
695 - timerValue[CPRL]=c;
696 - break;
697 - case TSR:
698 - timerValue[TSR]=c;
699 - break;
700 - }
701 -}
702 -
703 -/*______________________________________________________________
704 - | METHOD: Timer::Reset()
705 - | DESC: Resets the timer. And Initalizes the Registers.
706 - |______________________________________________________________
707 -*/
708 -void Timer::Reset()
709 -{
710 - // Resets the interupt handler.
711 - myInterruptPending = false;
712 - firstTime = true;
713 -
714 - // Clears the timers.
715 - for(int i=0; i <22; i++)
716 - timerValue[i]=0;
717 -}
718 -
719 -/*______________________________________________________________
720 - | METHOD: VetcorTimer::EventCallback(long *data, void *ptr)
721 - | DESC: Function that executes when interupt occures.
722 - | DEP FUNC: Requires decCNTR copyCPRtoCNTR.
723 - |______________________________________________________________
724 -*/
725 -void Timer::EventCallback(long data, void *ptr)
726 -{
727 - unsigned char cTCR = timerValue[TCR];
728 -
729 - // Test to see if timer is enabled, if False(0) do nothing.
730 - // but dispatch an event.
731 - if((cTCR&1) == 1)
732 - {
733 - // This test to see if the timer has not started a
734 - // count down. If it hasnt, copy the CPR register vaules
735 - // to the CNTR registers.
736 - if(firstTime == true)
737 - {
738 - firstTime = false;
739 - copyCPRtoCNTR();
740 - }
741 -
742 - // Decriments the CNTR if 0 then call interrupt.
743 - // else dispatch an event.
744 - if(decCNTR() != 0)
745 - {
746 - (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
747 - return;
748 - }
749 -
750 - // Since the timer is now done, set the first time to ture,
751 - // so the next time the TCR is set to 1 it will copy the
752 - // CPR Register to CNTR.
753 - firstTime = true;
754 -
755 - // Protocal says that the TCR should flip to 0. and that
756 - // TSR bit switches to 1. That is done below.
757 - timerValue[TCR] = (timerValue[TCR] & 0xfe);
758 - timerValue[TSR] = (timerValue[TSR] | 0x01);
759 -
760 - // Dispatch an IRQ only if user has set this in the
761 - // TCR register. (5 and 7) are the only valid
762 - // Interupts.
763 - if (((cTCR>>5) & 5) || ((cTCR>>5) &7))
764 - {
765 - InterruptRequest(TIMER_IRQ);
766 - }
767 - (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
768 - }
769 - else
770 - {
771 - (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
772 - }
773 -}
774 -
775 -/*______________________________________________________________
776 - | METHOD: CopyCPRtoCNTR
777 - | DESC: Copies the register value of CPR to CNTR.
778 - | USED: By funce EventCallback
779 - | DEP FUNC: None
780 - |______________________________________________________________
781 -*/
782 -void Timer::copyCPRtoCNTR()
783 -{
784 - timerValue[CNTRH] = timerValue[CPRH];
785 - timerValue[CNTRM] = timerValue[CPRM];
786 - timerValue[CNTRL] = timerValue[CPRL];
787 -}
788 -
789 -/*______________________________________________________________
790 - | METHOD: decCNTR
791 - | DESC: decriments the counter and checks for CNTR==0
792 - | retuns the value of CNTR.
793 - |______________________________________________________________
794 -*/
795 -unsigned int Timer::decCNTR()
796 -{
797 - int decValue;
798 - int temp24;
799 -
800 - // Grab the values of the 24bit register to a value.
801 - decValue = 0;
802 - temp24 = (unsigned int) timerValue[CNTRH];
803 - decValue = (decValue | ( temp24 << 24));
804 -
805 - temp24 = (unsigned int) timerValue[CNTRM];
806 - decValue = (decValue | (temp24 << 16));
807 -
808 - decValue = (decValue | timerValue[CNTRL]);
809 -
810 - decValue -= 250;
811 - if(decValue < 0)
812 - {
813 - decValue = 0;
814 - }
815 -
816 - // Put the value back the 24bit register to a value.
817 - // with the decremnt.
818 - timerValue[CNTRH] = ( unsigned char) (decValue >> 24);
819 - timerValue[CNTRM] = ( unsigned char) (decValue >> 16);
820 - timerValue[CNTRL] = ( unsigned char) (decValue );
821 -
822 - return (unsigned int) decValue;
823 -}
824 -
825 +///////////////////////////////////////////////////////////////////////////////
826 +//
827 +// Timer.cxx
828 +//
829 +// This class keeps up with a list of all of the availible devices and
830 +// allocates them. It's dervied from the BasicDeviceRegistry
831 +//
832 +// FILENAME: Timer.cxx
833 +// DESC: Simulates an timer for the M68000 CPU. Thus giving
834 +// the Simulator the ablility to simulate a timmer intrurpt.
835 +// Programmers can impliment time slicing with this timmer.
836 +//
837 +// Contains Register and Offsets for the timer.
838 +//
839 +// CREATE: 7-17-98
840 +// OWNER: Xavier Plasencia
841 +// ORG: SDSU
842 +// DEPEN: This file requiers the Event hander and the BasicDevice files.
843 +//
844 +///////////////////////////////////////////////////////////////////////////////
845 +// $Id: $
846 +///////////////////////////////////////////////////////////////////////////////
847 +
848 +#include <iostream>
849 +#include <strstream>
850 +#include <string>
851 +
852 +using namespace std;
853 +
854 +#include "../../Framework/BasicCPU.hxx"
855 +#include "Timer.hxx"
856 +
857 +///////////////////////////////////////////////////////////////////////////////
858 +// Constructor
859 +///////////////////////////////////////////////////////////////////////////////
860 +Timer::Timer(const string& args, BasicCPU& cpu)
861 + : BasicDevice("Timer", args, cpu)
862 +{
863 + istrstream in((char*)args.data(), args.size());
864 + string keyword, equals;
865 + unsigned long base;
866 + unsigned long irq;
867 +
868 + firstTime = true;
869 + // Scan "BaseAddress = nnnn"
870 + // This is important for the CPU to know what address space
871 + // is used by the device.
872 + in >> keyword >> equals >> hex >> base;
873 + if((!in) || (keyword != "BaseAddress") || (equals != "="))
874 + {
875 + ErrorMessage("Invalid initialization arguments!");
876 + return;
877 + }
878 +
879 + in >> keyword >> equals >> hex >> irq;
880 + if((!in) || (keyword != "IRQ") || (equals != "="))
881 + {
882 + ErrorMessage("Invalid initialization arguments!");
883 + return;
884 + }
885 +
886 +/*
887 + I've hardcoded the cycles setting to 2000 which should provide the
888 + 125000 ticks per second for the PI/T
889 +
890 + unsigned long timer_cycle;
891 + in >> keyword >> equals >> hex >> timer_cycle;
892 + if((!in) || (keyword != "CycleSec") || (equals != "="))
893 + {
894 + ErrorMessage("Invalid initialization arguments!");
895 + return;
896 + }
897 + Timer::TIMER_CPU_CYCLE = timer_cycle;
898 +*/
899 +
900 + Timer::TIMER_IRQ = irq;
901 + Timer::TIMER_CPU_CYCLE = 2000;
902 + baseAddress = base * cpu.Granularity();
903 +
904 + // This is needed to start the whole process. The eventhandler
905 + // will always request an event and test to see if the user has
906 + // enabled the timer it not nothing happens but if so. The
907 + // CPR register is copied to the CNTR and is decremented for every
908 + // Cycle.
909 + (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
910 +
911 + Reset();
912 +}
913 +
914 +///////////////////////////////////////////////////////////////////////////////
915 +// This routine should set myInterruptPending flag and send a request
916 +// to the CPU for an interrupt.
917 +///////////////////////////////////////////////////////////////////////////////
918 +void Timer::InterruptRequest(int level)
919 +{
920 + // If no interrupt is pending then request one
921 + if(!myInterruptPending)
922 + {
923 + myInterruptPending = true;
924 + myCPU.InterruptRequest(this, level);
925 + }
926 +}
927 +
928 +/*___________________________________________________________________________
929 + | FUNCTIONAME: InterruptAcknowledge(int)
930 + | DESC: This routine is called by the CPU when it processes a
931 + | requested interrupt. It should return the vector number associated with
932 + | the interrupt or AUTOVECTOR_INTERRUPT if the device doesn't generate
933 + | vectors. This default routine only does autovector interrupts.
934 + | This function is called by the CPU. The return value is usally the
935 + | memory location of a exemption funcion. How to handel these functions
936 + | one shold refer to a Motorla text book.
937 + | PARAM: None
938 + | NOTE: Vecotor codes 5 and 7 are the only masks that will make the timer
939 + | do somthing. 5 is a VECTOR and 7 is an AUTOVECTOR. The code
940 + | can be found in any manual.
941 + |___________________________________________________________________________
942 +*/
943 +long Timer::InterruptAcknowledge(int)
944 +{
945 + unsigned char cTCR = timerValue[TCR];
946 +
947 + if(myInterruptPending)
948 + {
949 + switch(cTCR>>5)
950 + {
951 + case 5:
952 + //By returning the address of the vector, the cpu will
953 + //call the vector that is located in the right mem location.
954 + myInterruptPending = false;
955 + return timerValue[TIVR];
956 + break;
957 +
958 + case 7:
959 + myInterruptPending = false;
960 + return AUTOVECTOR_INTERRUPT;
961 + break;
962 +
963 + default:
964 + return SPURIOUS_INTERRUPT;
965 + }
966 + }
967 + else
968 + {
969 + return(SPURIOUS_INTERRUPT);
970 + }
971 +}
972 +
973 +/*______________________________________________________________
974 + | METHOD: Timer::CheckMapped( unsigned long adress)
975 + | DESC: Check to see if address mapps to device.
976 + |______________________________________________________________
977 +*/
978 +bool Timer::CheckMapped(unsigned long address) const
979 +{
980 + return ((address >= baseAddress ) &&
981 + (address <= baseAddress+(22*sizeof(char))));
982 +}
983 +
984 +/*______________________________________________________________
985 + | METHOD: Timer::Peek(unsigned long address)
986 + | DESC: Returns a byte from the device's address.
987 + |
988 + | PEEK is the protocal that is used by the device to
989 + | inform the CPU what the registry settings are.
990 + | The use need not update the memory location for the CPU
991 + | All of this is done by the cpu and thus uses peek to
992 + | read the data that the device is using for the Memory
993 + | (i.e. RAM)
994 + |______________________________________________________________
995 +*/
996 +unsigned char Timer::Peek(unsigned long address)
997 +{
998 + switch((address-baseAddress))
999 + {
1000 + case TCR:
1001 + return timerValue[TCR];
1002 + case TIVR:
1003 + return timerValue[TIVR];
1004 + case NULR:
1005 + return timerValue[NULR];
1006 + case CPRH:
1007 + return timerValue[CPRH];
1008 + case CPRM:
1009 + return timerValue[CPRM];
1010 + case CPRL:
1011 + return timerValue[CPRL];
1012 + case CNTRH:
1013 + return timerValue[CNTRH];
1014 + case CNTRM:
1015 + return timerValue[CNTRM];
1016 + case CNTRL:
1017 + return timerValue[CNTRL];
1018 + case TSR:
1019 + return timerValue[TSR];
1020 + }
1021 + return 0; //Error not a valid address.
1022 +}
1023 +
1024 +/*______________________________________________________________
1025 + | METHOD: Timer::Poke(unsigned long address, char c)
1026 + | DESC: This is the interface to the rest of the World. Here
1027 + | the CPU or anyother devece writes to memory and updates the
1028 + | device. Poke Changes the value of the registers.
1029 + | Notice that there is no way for the user to WRITE to the
1030 + | registers CNTR, this is because they are read only.
1031 + |______________________________________________________________
1032 +*/
1033 +void Timer::Poke(unsigned long address, unsigned char c)
1034 +{
1035 + switch((address-baseAddress))
1036 + {
1037 + case TCR:
1038 + timerValue[TCR]=c;
1039 + break;
1040 + case TIVR:
1041 + timerValue[TIVR]=c;
1042 + break;
1043 + case NULR:
1044 + timerValue[NULR]=c;
1045 + break;
1046 + case CPRH:
1047 + timerValue[CPRH]=c;
1048 + break;
1049 + case CPRM:
1050 + timerValue[CPRM]=c;
1051 + break;
1052 + case CPRL:
1053 + timerValue[CPRL]=c;
1054 + break;
1055 + case TSR:
1056 + timerValue[TSR]=c;
1057 + break;
1058 + }
1059 +}
1060 +
1061 +/*______________________________________________________________
1062 + | METHOD: Timer::Reset()
1063 + | DESC: Resets the timer. And Initalizes the Registers.
1064 + |______________________________________________________________
1065 +*/
1066 +void Timer::Reset()
1067 +{
1068 + // Resets the interupt handler.
1069 + myInterruptPending = false;
1070 + firstTime = true;
1071 +
1072 + // Clears the timers.
1073 + for(int i=0; i <22; i++)
1074 + timerValue[i]=0;
1075 +}
1076 +
1077 +/*______________________________________________________________
1078 + | METHOD: VetcorTimer::EventCallback(long *data, void *ptr)
1079 + | DESC: Function that executes when interupt occures.
1080 + | DEP FUNC: Requires decCNTR copyCPRtoCNTR.
1081 + |______________________________________________________________
1082 +*/
1083 +void Timer::EventCallback(long data, void *ptr)
1084 +{
1085 + unsigned char cTCR = timerValue[TCR];
1086 +
1087 + // Test to see if timer is enabled, if False(0) do nothing.
1088 + // but dispatch an event.
1089 + if((cTCR&1) == 1)
1090 + {
1091 + // This test to see if the timer has not started a
1092 + // count down. If it hasnt, copy the CPR register vaules
1093 + // to the CNTR registers.
1094 + if(firstTime == true)
1095 + {
1096 + firstTime = false;
1097 + copyCPRtoCNTR();
1098 + }
1099 +
1100 + // Decriments the CNTR if 0 then call interrupt.
1101 + // else dispatch an event.
1102 + if(decCNTR() != 0)
1103 + {
1104 + (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
1105 + return;
1106 + }
1107 +
1108 + // Since the timer is now done, set the first time to ture,
1109 + // so the next time the TCR is set to 1 it will copy the
1110 + // CPR Register to CNTR.
1111 + firstTime = true;
1112 +
1113 + // Protocal says that the TCR should flip to 0. and that
1114 + // TSR bit switches to 1. That is done below.
1115 + timerValue[TCR] = (timerValue[TCR] & 0xfe);
1116 + timerValue[TSR] = (timerValue[TSR] | 0x01);
1117 +
1118 + // Dispatch an IRQ only if user has set this in the
1119 + // TCR register. (5 and 7) are the only valid
1120 + // Interupts.
1121 + if (((cTCR>>5) & 5) || ((cTCR>>5) &7))
1122 + {
1123 + InterruptRequest(TIMER_IRQ);
1124 + }
1125 + (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
1126 + }
1127 + else
1128 + {
1129 + (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
1130 + }
1131 +}
1132 +
1133 +/*______________________________________________________________
1134 + | METHOD: CopyCPRtoCNTR
1135 + | DESC: Copies the register value of CPR to CNTR.
1136 + | USED: By funce EventCallback
1137 + | DEP FUNC: None
1138 + |______________________________________________________________
1139 +*/
1140 +void Timer::copyCPRtoCNTR()
1141 +{
1142 + timerValue[CNTRH] = timerValue[CPRH];
1143 + timerValue[CNTRM] = timerValue[CPRM];
1144 + timerValue[CNTRL] = timerValue[CPRL];
1145 +}
1146 +
1147 +/*______________________________________________________________
1148 + | METHOD: decCNTR
1149 + | DESC: decriments the counter and checks for CNTR==0
1150 + | retuns the value of CNTR.
1151 + |______________________________________________________________
1152 +*/
1153 +unsigned int Timer::decCNTR()
1154 +{
1155 + int decValue;
1156 + int temp24;
1157 +
1158 + // Grab the values of the 24bit register to a value.
1159 + decValue = 0;
1160 + temp24 = (unsigned int) timerValue[CNTRH];
1161 + decValue = (decValue | ( temp24 << 24));
1162 +
1163 + temp24 = (unsigned int) timerValue[CNTRM];
1164 + decValue = (decValue | (temp24 << 16));
1165 +
1166 + decValue = (decValue | timerValue[CNTRL]);
1167 +
1168 + decValue -= 250;
1169 + if(decValue < 0)
1170 + {
1171 + decValue = 0;
1172 + }
1173 +
1174 + // Put the value back the 24bit register to a value.
1175 + // with the decremnt.
1176 + timerValue[CNTRH] = ( unsigned char) (decValue >> 24);
1177 + timerValue[CNTRM] = ( unsigned char) (decValue >> 16);
1178 + timerValue[CNTRL] = ( unsigned char) (decValue );
1179 +
1180 + return (unsigned int) decValue;
1181 +}
1182 +
1183 diff -ur bsvc-2.1/src/sim68000/devices/Timer.hxx bsvc-2.1-fixed/src/sim68000/devices/Timer.hxx
1184 --- bsvc-2.1/src/sim68000/devices/Timer.hxx 1998-11-09 04:39:28.000000000 +0100
1185 +++ bsvc-2.1-fixed/src/sim68000/devices/Timer.hxx 2007-05-30 22:47:40.000000000 +0200
1186 @@ -23,11 +23,9 @@
1187
1188 #include <string>
1189
1190 -#ifdef USE_STD
1191 - using namespace std;
1192 -#endif
1193 +using namespace std;
1194
1195 -#include "BasicDevice.hxx"
1196 +#include "../../Framework/BasicDevice.hxx"
1197
1198 #define AUTOVECTOR_INTERRUPT -1
1199 #define SPURIOUS_INTERRUPT -2
1200 diff -ur bsvc-2.1/src/sim68000/loader/Loader.cxx bsvc-2.1-fixed/src/sim68000/loader/Loader.cxx
1201 --- bsvc-2.1/src/sim68000/loader/Loader.cxx 1998-11-09 04:39:28.000000000 +0100
1202 +++ bsvc-2.1-fixed/src/sim68000/loader/Loader.cxx 2007-05-30 22:47:40.000000000 +0200
1203 @@ -13,9 +13,9 @@
1204 // $Id: Loader.cxx,v 1.1 1996/08/06 11:53:58 bwmott Exp $
1205 ///////////////////////////////////////////////////////////////////////////////
1206
1207 -#include "AddressSpace.hxx"
1208 -#include "BasicCPU.hxx"
1209 -#include "Tools.hxx"
1210 +#include "../../Framework/AddressSpace.hxx"
1211 +#include "../../Framework/BasicCPU.hxx"
1212 +#include "../../Framework/Tools.hxx"
1213 #include "Loader.hxx"
1214
1215 ///////////////////////////////////////////////////////////////////////////////
1216 @@ -26,11 +26,7 @@
1217 string error;
1218
1219 // Open the file for reading
1220 - #ifdef USE_STD
1221 - fstream file(filename, ios::in);
1222 - #else
1223 - fstream file(filename, ios::in | ios::nocreate);
1224 - #endif
1225 + fstream file(filename, ios::in);
1226
1227 // Make sure the file was opened
1228 if(file.fail())
1229 diff -ur bsvc-2.1/src/sim68000/loader/Loader.hxx bsvc-2.1-fixed/src/sim68000/loader/Loader.hxx
1230 --- bsvc-2.1/src/sim68000/loader/Loader.hxx 1998-11-09 04:39:28.000000000 +0100
1231 +++ bsvc-2.1-fixed/src/sim68000/loader/Loader.hxx 2007-05-30 22:47:40.000000000 +0200
1232 @@ -16,19 +16,12 @@
1233 #ifndef LOADER_HXX
1234 #define LOADER_HXX
1235
1236 -#ifdef WIN32
1237 - #include <iostream>
1238 - #include <fstream>
1239 -#else
1240 - #include <iostream.h>
1241 - #include <fstream.h>
1242 -#endif
1243 +#include <iostream>
1244 +#include <fstream>
1245
1246 -#ifdef USE_STD
1247 - using namespace std;
1248 -#endif
1249 +using namespace std;
1250
1251 -#include "BasicLoader.hxx"
1252 +#include "../../Framework/BasicLoader.hxx"
1253
1254 ///////////////////////////////////////////////////////////////////////////////
1255 // The Loader Class
1256 diff -ur bsvc-2.1/src/sim68000/main.cxx bsvc-2.1-fixed/src/sim68000/main.cxx
1257 --- bsvc-2.1/src/sim68000/main.cxx 1998-11-09 04:39:28.000000000 +0100
1258 +++ bsvc-2.1-fixed/src/sim68000/main.cxx 2007-05-30 22:47:40.000000000 +0200
1259 @@ -14,12 +14,12 @@
1260 // $Id: main.cxx,v 1.1 1996/08/02 14:58:12 bwmott Exp $
1261 ///////////////////////////////////////////////////////////////////////////////
1262
1263 -#include "Interface.hxx"
1264 +#include "../Framework/Interface.hxx"
1265 #include "cpu/m68000.hxx"
1266 #include "devices/DeviceRegistry.hxx"
1267 #include "loader/Loader.hxx"
1268
1269 -main()
1270 +int main()
1271 {
1272 BasicCPU& processor = *(new m68000);
1273 BasicLoader& loader = *(new Loader(processor));
1274 diff -ur bsvc-2.1/src/sim68360/cpu/Makefile bsvc-2.1-fixed/src/sim68360/cpu/Makefile
1275 --- bsvc-2.1/src/sim68360/cpu/Makefile 1998-11-09 04:39:29.000000000 +0100
1276 +++ bsvc-2.1-fixed/src/sim68360/cpu/Makefile 2007-05-30 22:47:40.000000000 +0200
1277 @@ -31,7 +31,7 @@
1278 $(CC) $(INCLUDES) -o instruction instruction.c
1279
1280 cpu32DecodeTable.hxx: instruction instruction.list
1281 - $(PROJECT_BASE)/src/sim68360/cpu/instruction
1282 + ./instruction
1283
1284 clean:
1285 rm -f *.o $(LIBRARY) instruction
1286 diff -ur bsvc-2.1/src/sim68360/cpu/cpu32.cxx bsvc-2.1-fixed/src/sim68360/cpu/cpu32.cxx
1287 --- bsvc-2.1/src/sim68360/cpu/cpu32.cxx 1998-11-09 04:39:29.000000000 +0100
1288 +++ bsvc-2.1-fixed/src/sim68360/cpu/cpu32.cxx 2007-05-30 22:47:40.000000000 +0200
1289 @@ -24,11 +24,11 @@
1290 // $Id: m68000.cxx,v 1.1 1996/08/02 14:59:18 bwmott Exp $
1291 ///////////////////////////////////////////////////////////////////////////////
1292
1293 -#include "Tools.hxx"
1294 +#include "../../Framework/Tools.hxx"
1295 #include "cpu32.hxx"
1296 -#include "BasicDevice.hxx"
1297 -#include "RegInfo.hxx"
1298 -#include "AddressSpace.hxx"
1299 +#include "../../Framework/BasicDevice.hxx"
1300 +#include "../../Framework/RegInfo.hxx"
1301 +#include "../../Framework/AddressSpace.hxx"
1302
1303 // Array of information about each register
1304 cpu32::RegisterData cpu32::ourRegisterData[] = {
1305 diff -ur bsvc-2.1/src/sim68360/cpu/cpu32.hxx bsvc-2.1-fixed/src/sim68360/cpu/cpu32.hxx
1306 --- bsvc-2.1/src/sim68360/cpu/cpu32.hxx 1998-11-09 04:39:29.000000000 +0100
1307 +++ bsvc-2.1-fixed/src/sim68360/cpu/cpu32.hxx 2007-05-30 22:47:40.000000000 +0200
1308 @@ -27,19 +27,13 @@
1309
1310 #include <string>
1311
1312 -#ifdef WIN32
1313 - #include <iostream>
1314 -#else
1315 - #include <iostream.h>
1316 -#endif
1317 -
1318 -#ifdef USE_STD
1319 - using namespace std;
1320 -#endif
1321 +#include <iostream>
1322 +
1323 +using namespace std;
1324
1325 class BasicDevice;
1326
1327 -#include "BasicCPU.hxx"
1328 +#include "../../Framework/BasicCPU.hxx"
1329
1330 // Set Condition Code operation types
1331 #define ADDITION 0
1332 diff -ur bsvc-2.1/src/sim68360/cpu/exec.cxx bsvc-2.1-fixed/src/sim68360/cpu/exec.cxx
1333 --- bsvc-2.1/src/sim68360/cpu/exec.cxx 1998-11-09 04:39:29.000000000 +0100
1334 +++ bsvc-2.1-fixed/src/sim68360/cpu/exec.cxx 2007-05-30 22:47:40.000000000 +0200
1335 @@ -40,13 +40,11 @@
1336
1337 #include <string>
1338
1339 -#ifdef USE_STD
1340 - using namespace std;
1341 -#endif
1342 +using namespace std;
1343
1344 -#include "AddressSpace.hxx"
1345 +#include "../../Framework/AddressSpace.hxx"
1346 #include "cpu32.hxx"
1347 -#include "Tools.hxx"
1348 +#include "../../Framework/Tools.hxx"
1349
1350 ///////////////////////////////////////////////////////////////////////////////
1351 // Compute the effective address, given the mode and register bits
1352 diff -ur bsvc-2.1/src/sim68360/devices/DeviceRegistry.cxx bsvc-2.1-fixed/src/sim68360/devices/DeviceRegistry.cxx
1353 --- bsvc-2.1/src/sim68360/devices/DeviceRegistry.cxx 1998-11-09 04:39:29.000000000 +0100
1354 +++ bsvc-2.1-fixed/src/sim68360/devices/DeviceRegistry.cxx 2007-05-30 22:47:40.000000000 +0200
1355 @@ -16,24 +16,16 @@
1356 // $Id: DeviceRegistry.cxx,v 1.1 1996/08/02 15:00:34 bwmott Exp $
1357 ///////////////////////////////////////////////////////////////////////////////
1358
1359 -#ifdef WIN32
1360 - #include <iostream>
1361 -#else
1362 - #include <iostream.h>
1363 -#endif
1364 +#include <iostream>
1365
1366 -#ifdef USE_STD
1367 - using namespace std;
1368 -#endif
1369 +using namespace std;
1370
1371 #include "DeviceRegistry.hxx"
1372 #include "RAM.hxx"
1373 #include "Timer.hxx"
1374
1375 -#ifndef WIN32
1376 - #include "Gdbsock.hxx"
1377 - #include "M68681.hxx"
1378 -#endif
1379 +#include "Gdbsock.hxx"
1380 +#include "M68681.hxx"
1381
1382 ///////////////////////////////////////////////////////////////////////////////
1383 // Array of device information (name, description, tcl script)
1384 diff -ur bsvc-2.1/src/sim68360/devices/DeviceRegistry.hxx bsvc-2.1-fixed/src/sim68360/devices/DeviceRegistry.hxx
1385 --- bsvc-2.1/src/sim68360/devices/DeviceRegistry.hxx 1998-11-09 04:39:29.000000000 +0100
1386 +++ bsvc-2.1-fixed/src/sim68360/devices/DeviceRegistry.hxx 2007-05-30 22:47:40.000000000 +0200
1387 @@ -17,7 +17,7 @@
1388 #ifndef DEVICEREGISTRY_HXX
1389 #define DEVICEREGISTRY_HXX
1390
1391 -#include "BasicDeviceRegistry.hxx"
1392 +#include "../../Framework/BasicDeviceRegistry.hxx"
1393
1394 ///////////////////////////////////////////////////////////////////////////////
1395 // The DeviceRegistry Class
1396 diff -ur bsvc-2.1/src/sim68360/devices/Gdbsock.cxx bsvc-2.1-fixed/src/sim68360/devices/Gdbsock.cxx
1397 --- bsvc-2.1/src/sim68360/devices/Gdbsock.cxx 1998-11-09 04:39:29.000000000 +0100
1398 +++ bsvc-2.1-fixed/src/sim68360/devices/Gdbsock.cxx 2007-05-30 22:47:40.000000000 +0200
1399 @@ -29,13 +29,8 @@
1400 // $Id: $
1401 ///////////////////////////////////////////////////////////////////////////////
1402
1403 -#ifdef WIN32
1404 -#include <iostream.h>
1405 -#include <strstrea.h>
1406 -#else
1407 -#include <iostream.h>
1408 -#include <strstream.h>
1409 -#endif
1410 +#include <iostream>
1411 +#include <strstream>
1412
1413 #include <sys/time.h>
1414 #include <sys/types.h>
1415 @@ -47,8 +42,8 @@
1416 #include <stdlib.h>
1417 #include <errno.h>
1418
1419 -#include "Tools.hxx"
1420 -#include "BasicCPU.hxx"
1421 +#include "../../Framework/Tools.hxx"
1422 +#include "../../Framework/BasicCPU.hxx"
1423 #include "Gdbsock.hxx"
1424
1425 // The duration of the default select events
1426 diff -ur bsvc-2.1/src/sim68360/devices/Gdbsock.hxx bsvc-2.1-fixed/src/sim68360/devices/Gdbsock.hxx
1427 --- bsvc-2.1/src/sim68360/devices/Gdbsock.hxx 1998-11-09 04:39:29.000000000 +0100
1428 +++ bsvc-2.1-fixed/src/sim68360/devices/Gdbsock.hxx 2007-05-30 22:47:40.000000000 +0200
1429 @@ -19,7 +19,7 @@
1430 #ifndef GDBSOCK_HXX
1431 #define GDBSOCK_HXX
1432
1433 -#include "BasicDevice.hxx"
1434 +#include "../../Framework/BasicDevice.hxx"
1435
1436 class GdbSocket : public BasicDevice {
1437 public:
1438 diff -ur bsvc-2.1/src/sim68360/devices/M68681.cxx bsvc-2.1-fixed/src/sim68360/devices/M68681.cxx
1439 --- bsvc-2.1/src/sim68360/devices/M68681.cxx 1998-11-09 04:39:29.000000000 +0100
1440 +++ bsvc-2.1-fixed/src/sim68360/devices/M68681.cxx 2007-05-30 22:47:40.000000000 +0200
1441 @@ -13,8 +13,8 @@
1442 // $Id: M68681.cxx,v 1.1 1996/08/02 15:01:10 bwmott Exp $
1443 ///////////////////////////////////////////////////////////////////////////////
1444
1445 -#include <iostream.h>
1446 -#include <strstream.h>
1447 +#include <iostream>
1448 +#include <strstream>
1449 #include <string>
1450
1451 #include <sys/types.h>
1452 @@ -22,7 +22,7 @@
1453 #include <fcntl.h>
1454 #include <signal.h>
1455
1456 -#include "BasicCPU.hxx"
1457 +#include "../../Framework/BasicCPU.hxx"
1458 #include "M68681.hxx"
1459
1460 // Callback types
1461 diff -ur bsvc-2.1/src/sim68360/devices/M68681.hxx bsvc-2.1-fixed/src/sim68360/devices/M68681.hxx
1462 --- bsvc-2.1/src/sim68360/devices/M68681.hxx 1998-11-09 04:39:29.000000000 +0100
1463 +++ bsvc-2.1-fixed/src/sim68360/devices/M68681.hxx 2007-05-30 22:47:40.000000000 +0200
1464 @@ -19,7 +19,9 @@
1465 #include <string>
1466 #include <sys/types.h>
1467
1468 -#include "BasicDevice.hxx"
1469 +#include "../../Framework/BasicDevice.hxx"
1470 +
1471 +using namespace std;
1472
1473 class M68681 : public BasicDevice {
1474 public:
1475 diff -ur bsvc-2.1/src/sim68360/devices/RAM.cxx bsvc-2.1-fixed/src/sim68360/devices/RAM.cxx
1476 --- bsvc-2.1/src/sim68360/devices/RAM.cxx 1998-11-09 04:39:29.000000000 +0100
1477 +++ bsvc-2.1-fixed/src/sim68360/devices/RAM.cxx 2007-05-30 22:47:40.000000000 +0200
1478 @@ -13,20 +13,13 @@
1479 // $Id: RAM.cxx,v 1.1 1996/08/02 15:02:49 bwmott Exp $
1480 ///////////////////////////////////////////////////////////////////////////////
1481
1482 -#ifdef WIN32
1483 - #include <iostream>
1484 - #include <strstream>
1485 -#else
1486 - #include <iostream.h>
1487 - #include <strstream.h>
1488 -#endif
1489 -
1490 -#ifdef USE_STD
1491 - using namespace std;
1492 -#endif
1493 +#include <iostream>
1494 +#include <strstream>
1495
1496 -#include "Tools.hxx"
1497 -#include "BasicCPU.hxx"
1498 +using namespace std;
1499 +
1500 +#include "../../Framework/Tools.hxx"
1501 +#include "../../Framework/BasicCPU.hxx"
1502 #include "RAM.hxx"
1503
1504 ///////////////////////////////////////////////////////////////////////////////
1505 diff -ur bsvc-2.1/src/sim68360/devices/RAM.hxx bsvc-2.1-fixed/src/sim68360/devices/RAM.hxx
1506 --- bsvc-2.1/src/sim68360/devices/RAM.hxx 1998-11-09 04:39:29.000000000 +0100
1507 +++ bsvc-2.1-fixed/src/sim68360/devices/RAM.hxx 2007-05-30 22:47:40.000000000 +0200
1508 @@ -18,11 +18,9 @@
1509
1510 #include <string>
1511
1512 -#ifdef USE_STD
1513 - using namespace std;
1514 -#endif
1515 +using namespace std;
1516
1517 -#include "BasicDevice.hxx"
1518 +#include "../../Framework/BasicDevice.hxx"
1519
1520 class RAM : public BasicDevice {
1521 public:
1522 diff -ur bsvc-2.1/src/sim68360/devices/Timer.cxx bsvc-2.1-fixed/src/sim68360/devices/Timer.cxx
1523 --- bsvc-2.1/src/sim68360/devices/Timer.cxx 1998-11-09 04:39:29.000000000 +0100
1524 +++ bsvc-2.1-fixed/src/sim68360/devices/Timer.cxx 2007-05-30 22:47:40.000000000 +0200
1525 @@ -1,366 +1,358 @@
1526 -///////////////////////////////////////////////////////////////////////////////
1527 -//
1528 -// Timer.cxx
1529 -//
1530 -// This class keeps up with a list of all of the availible devices and
1531 -// allocates them. It's dervied from the BasicDeviceRegistry
1532 -//
1533 -// FILENAME: Timer.cxx
1534 -// DESC: Simulates an timer for the M68000 CPU. Thus giving
1535 -// the Simulator the ablility to simulate a timmer intrurpt.
1536 -// Programmers can impliment time slicing with this timmer.
1537 -//
1538 -// Contains Register and Offsets for the timer.
1539 -//
1540 -// CREATE: 7-17-98
1541 -// OWNER: Xavier Plasencia
1542 -// ORG: SDSU
1543 -// DEPEN: This file requiers the Event hander and the BasicDevice files.
1544 -//
1545 -///////////////////////////////////////////////////////////////////////////////
1546 -// $Id: $
1547 -///////////////////////////////////////////////////////////////////////////////
1548 -
1549 -#ifdef WIN32
1550 - #include <iostream>
1551 - #include <strstream>
1552 - #include <cstring>
1553 -#else
1554 - #include <iostream.h>
1555 - #include <strstream.h>
1556 - #include <string.h>
1557 -#endif
1558 -
1559 -#ifdef USE_STD
1560 - using namespace std;
1561 -#endif
1562 -
1563 -#include "BasicCPU.hxx"
1564 -#include "Timer.hxx"
1565 -
1566 -///////////////////////////////////////////////////////////////////////////////
1567 -// Constructor
1568 -///////////////////////////////////////////////////////////////////////////////
1569 -Timer::Timer(const string& args, BasicCPU& cpu)
1570 - : BasicDevice("Timer", args, cpu)
1571 -{
1572 - istrstream in((char*)args.data(), args.size());
1573 - string keyword, equals;
1574 - unsigned long base;
1575 - unsigned long irq;
1576 -
1577 - firstTime = true;
1578 - // Scan "BaseAddress = nnnn"
1579 - // This is important for the CPU to know what address space
1580 - // is used by the device.
1581 - in >> keyword >> equals >> hex >> base;
1582 - if((!in) || (keyword != "BaseAddress") || (equals != "="))
1583 - {
1584 - ErrorMessage("Invalid initialization arguments!");
1585 - return;
1586 - }
1587 -
1588 - in >> keyword >> equals >> hex >> irq;
1589 - if((!in) || (keyword != "IRQ") || (equals != "="))
1590 - {
1591 - ErrorMessage("Invalid initialization arguments!");
1592 - return;
1593 - }
1594 -
1595 -/*
1596 - I've hardcoded the cycles setting to 2000 which should provide the
1597 - 125000 ticks per second for the PI/T
1598 -
1599 - unsigned long timer_cycle;
1600 - in >> keyword >> equals >> hex >> timer_cycle;
1601 - if((!in) || (keyword != "CycleSec") || (equals != "="))
1602 - {
1603 - ErrorMessage("Invalid initialization arguments!");
1604 - return;
1605 - }
1606 - Timer::TIMER_CPU_CYCLE = timer_cycle;
1607 -*/
1608 -
1609 - Timer::TIMER_IRQ = irq;
1610 - Timer::TIMER_CPU_CYCLE = 2000;
1611 - baseAddress = base * cpu.Granularity();
1612 -
1613 - // This is needed to start the whole process. The eventhandler
1614 - // will always request an event and test to see if the user has
1615 - // enabled the timer it not nothing happens but if so. The
1616 - // CPR register is copied to the CNTR and is decremented for every
1617 - // Cycle.
1618 - (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
1619 -
1620 - Reset();
1621 -}
1622 -
1623 -///////////////////////////////////////////////////////////////////////////////
1624 -// This routine should set myInterruptPending flag and send a request
1625 -// to the CPU for an interrupt.
1626 -///////////////////////////////////////////////////////////////////////////////
1627 -void Timer::InterruptRequest(int level)
1628 -{
1629 - // If no interrupt is pending then request one
1630 - if(!myInterruptPending)
1631 - {
1632 - myInterruptPending = true;
1633 - myCPU.InterruptRequest(this, level);
1634 - }
1635 -}
1636 -
1637 -/*___________________________________________________________________________
1638 - | FUNCTIONAME: InterruptAcknowledge(int)
1639 - | DESC: This routine is called by the CPU when it processes a
1640 - | requested interrupt. It should return the vector number associated with
1641 - | the interrupt or AUTOVECTOR_INTERRUPT if the device doesn't generate
1642 - | vectors. This default routine only does autovector interrupts.
1643 - | This function is called by the CPU. The return value is usally the
1644 - | memory location of a exemption funcion. How to handel these functions
1645 - | one shold refer to a Motorla text book.
1646 - | PARAM: None
1647 - | NOTE: Vecotor codes 5 and 7 are the only masks that will make the timer
1648 - | do somthing. 5 is a VECTOR and 7 is an AUTOVECTOR. The code
1649 - | can be found in any manual.
1650 - |___________________________________________________________________________
1651 -*/
1652 -long Timer::InterruptAcknowledge(int)
1653 -{
1654 - unsigned char cTCR = timerValue[TCR];
1655 -
1656 - if(myInterruptPending)
1657 - {
1658 - switch(cTCR>>5)
1659 - {
1660 - case 5:
1661 - //By returning the address of the vector, the cpu will
1662 - //call the vector that is located in the right mem location.
1663 - myInterruptPending = false;
1664 - return timerValue[TIVR];
1665 - break;
1666 -
1667 - case 7:
1668 - myInterruptPending = false;
1669 - return AUTOVECTOR_INTERRUPT;
1670 - break;
1671 -
1672 - default:
1673 - return SPURIOUS_INTERRUPT;
1674 - }
1675 - }
1676 - else
1677 - {
1678 - return(SPURIOUS_INTERRUPT);
1679 - }
1680 -}
1681 -
1682 -/*______________________________________________________________
1683 - | METHOD: Timer::CheckMapped( unsigned long adress)
1684 - | DESC: Check to see if address mapps to device.
1685 - |______________________________________________________________
1686 -*/
1687 -bool Timer::CheckMapped(unsigned long address) const
1688 -{
1689 - return ((address >= baseAddress ) &&
1690 - (address <= baseAddress+(22*sizeof(char))));
1691 -}
1692 -
1693 -/*______________________________________________________________
1694 - | METHOD: Timer::Peek(unsigned long address)
1695 - | DESC: Returns a byte from the device's address.
1696 - |
1697 - | PEEK is the protocal that is used by the device to
1698 - | inform the CPU what the registry settings are.
1699 - | The use need not update the memory location for the CPU
1700 - | All of this is done by the cpu and thus uses peek to
1701 - | read the data that the device is using for the Memory
1702 - | (i.e. RAM)
1703 - |______________________________________________________________
1704 -*/
1705 -unsigned char Timer::Peek(unsigned long address)
1706 -{
1707 - switch((address-baseAddress))
1708 - {
1709 - case TCR:
1710 - return timerValue[TCR];
1711 - case TIVR:
1712 - return timerValue[TIVR];
1713 - case NULR:
1714 - return timerValue[NULR];
1715 - case CPRH:
1716 - return timerValue[CPRH];
1717 - case CPRM:
1718 - return timerValue[CPRM];
1719 - case CPRL:
1720 - return timerValue[CPRL];
1721 - case CNTRH:
1722 - return timerValue[CNTRH];
1723 - case CNTRM:
1724 - return timerValue[CNTRM];
1725 - case CNTRL:
1726 - return timerValue[CNTRL];
1727 - case TSR:
1728 - return timerValue[TSR];
1729 - }
1730 - return 0; //Error not a valid address.
1731 -}
1732 -
1733 -/*______________________________________________________________
1734 - | METHOD: Timer::Poke(unsigned long address, char c)
1735 - | DESC: This is the interface to the rest of the World. Here
1736 - | the CPU or anyother devece writes to memory and updates the
1737 - | device. Poke Changes the value of the registers.
1738 - | Notice that there is no way for the user to WRITE to the
1739 - | registers CNTR, this is because they are read only.
1740 - |______________________________________________________________
1741 -*/
1742 -void Timer::Poke(unsigned long address, unsigned char c)
1743 -{
1744 - switch((address-baseAddress))
1745 - {
1746 - case TCR:
1747 - timerValue[TCR]=c;
1748 - break;
1749 - case TIVR:
1750 - timerValue[TIVR]=c;
1751 - break;
1752 - case NULR:
1753 - timerValue[NULR]=c;
1754 - break;
1755 - case CPRH:
1756 - timerValue[CPRH]=c;
1757 - break;
1758 - case CPRM:
1759 - timerValue[CPRM]=c;
1760 - break;
1761 - case CPRL:
1762 - timerValue[CPRL]=c;
1763 - break;
1764 - case TSR:
1765 - timerValue[TSR]=c;
1766 - break;
1767 - }
1768 -}
1769 -
1770 -/*______________________________________________________________
1771 - | METHOD: Timer::Reset()
1772 - | DESC: Resets the timer. And Initalizes the Registers.
1773 - |______________________________________________________________
1774 -*/
1775 -void Timer::Reset()
1776 -{
1777 - // Resets the interupt handler.
1778 - myInterruptPending = false;
1779 - firstTime = true;
1780 -
1781 - // Clears the timers.
1782 - for(int i=0; i <22; i++)
1783 - timerValue[i]=0;
1784 -}
1785 -
1786 -/*______________________________________________________________
1787 - | METHOD: VetcorTimer::EventCallback(long *data, void *ptr)
1788 - | DESC: Function that executes when interupt occures.
1789 - | DEP FUNC: Requires decCNTR copyCPRtoCNTR.
1790 - |______________________________________________________________
1791 -*/
1792 -void Timer::EventCallback(long data, void *ptr)
1793 -{
1794 - unsigned char cTCR = timerValue[TCR];
1795 -
1796 - // Test to see if timer is enabled, if False(0) do nothing.
1797 - // but dispatch an event.
1798 - if((cTCR&1) == 1)
1799 - {
1800 - // This test to see if the timer has not started a
1801 - // count down. If it hasnt, copy the CPR register vaules
1802 - // to the CNTR registers.
1803 - if(firstTime == true)
1804 - {
1805 - firstTime = false;
1806 - copyCPRtoCNTR();
1807 - }
1808 -
1809 - // Decriments the CNTR if 0 then call interrupt.
1810 - // else dispatch an event.
1811 - if(decCNTR() != 0)
1812 - {
1813 - (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
1814 - return;
1815 - }
1816 -
1817 - // Since the timer is now done, set the first time to ture,
1818 - // so the next time the TCR is set to 1 it will copy the
1819 - // CPR Register to CNTR.
1820 - firstTime = true;
1821 -
1822 - // Protocal says that the TCR should flip to 0. and that
1823 - // TSR bit switches to 1. That is done below.
1824 - timerValue[TCR] = (timerValue[TCR] & 0xfe);
1825 - timerValue[TSR] = (timerValue[TSR] | 0x01);
1826 -
1827 - // Dispatch an IRQ only if user has set this in the
1828 - // TCR register. (5 and 7) are the only valid
1829 - // Interupts.
1830 - if (((cTCR>>5) & 5) || ((cTCR>>5) &7))
1831 - {
1832 - InterruptRequest(TIMER_IRQ);
1833 - }
1834 - (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
1835 - }
1836 - else
1837 - {
1838 - (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
1839 - }
1840 -}
1841 -
1842 -/*______________________________________________________________
1843 - | METHOD: CopyCPRtoCNTR
1844 - | DESC: Copies the register value of CPR to CNTR.
1845 - | USED: By funce EventCallback
1846 - | DEP FUNC: None
1847 - |______________________________________________________________
1848 -*/
1849 -void Timer::copyCPRtoCNTR()
1850 -{
1851 - timerValue[CNTRH] = timerValue[CPRH];
1852 - timerValue[CNTRM] = timerValue[CPRM];
1853 - timerValue[CNTRL] = timerValue[CPRL];
1854 -}
1855 -
1856 -/*______________________________________________________________
1857 - | METHOD: decCNTR
1858 - | DESC: decriments the counter and checks for CNTR==0
1859 - | retuns the value of CNTR.
1860 - |______________________________________________________________
1861 -*/
1862 -unsigned int Timer::decCNTR()
1863 -{
1864 - int decValue;
1865 - int temp24;
1866 -
1867 - // Grab the values of the 24bit register to a value.
1868 - decValue = 0;
1869 - temp24 = (unsigned int) timerValue[CNTRH];
1870 - decValue = (decValue | ( temp24 << 24));
1871 -
1872 - temp24 = (unsigned int) timerValue[CNTRM];
1873 - decValue = (decValue | (temp24 << 16));
1874 -
1875 - decValue = (decValue | timerValue[CNTRL]);
1876 -
1877 - decValue -= 250;
1878 - if(decValue < 0)
1879 - {
1880 - decValue = 0;
1881 - }
1882 -
1883 - // Put the value back the 24bit register to a value.
1884 - // with the decremnt.
1885 - timerValue[CNTRH] = ( unsigned char) (decValue >> 24);
1886 - timerValue[CNTRM] = ( unsigned char) (decValue >> 16);
1887 - timerValue[CNTRL] = ( unsigned char) (decValue );
1888 -
1889 - return (unsigned int) decValue;
1890 -}
1891 -
1892 +///////////////////////////////////////////////////////////////////////////////
1893 +//
1894 +// Timer.cxx
1895 +//
1896 +// This class keeps up with a list of all of the availible devices and
1897 +// allocates them. It's dervied from the BasicDeviceRegistry
1898 +//
1899 +// FILENAME: Timer.cxx
1900 +// DESC: Simulates an timer for the M68000 CPU. Thus giving
1901 +// the Simulator the ablility to simulate a timmer intrurpt.
1902 +// Programmers can impliment time slicing with this timmer.
1903 +//
1904 +// Contains Register and Offsets for the timer.
1905 +//
1906 +// CREATE: 7-17-98
1907 +// OWNER: Xavier Plasencia
1908 +// ORG: SDSU
1909 +// DEPEN: This file requiers the Event hander and the BasicDevice files.
1910 +//
1911 +///////////////////////////////////////////////////////////////////////////////
1912 +// $Id: $
1913 +///////////////////////////////////////////////////////////////////////////////
1914 +
1915 +#include <iostream>
1916 +#include <strstream>
1917 +#include <string>
1918 +
1919 +using namespace std;
1920 +
1921 +#include "../../Framework/BasicCPU.hxx"
1922 +#include "Timer.hxx"
1923 +
1924 +///////////////////////////////////////////////////////////////////////////////
1925 +// Constructor
1926 +///////////////////////////////////////////////////////////////////////////////
1927 +Timer::Timer(const string& args, BasicCPU& cpu)
1928 + : BasicDevice("Timer", args, cpu)
1929 +{
1930 + istrstream in((char*)args.data(), args.size());
1931 + string keyword, equals;
1932 + unsigned long base;
1933 + unsigned long irq;
1934 +
1935 + firstTime = true;
1936 + // Scan "BaseAddress = nnnn"
1937 + // This is important for the CPU to know what address space
1938 + // is used by the device.
1939 + in >> keyword >> equals >> hex >> base;
1940 + if((!in) || (keyword != "BaseAddress") || (equals != "="))
1941 + {
1942 + ErrorMessage("Invalid initialization arguments!");
1943 + return;
1944 + }
1945 +
1946 + in >> keyword >> equals >> hex >> irq;
1947 + if((!in) || (keyword != "IRQ") || (equals != "="))
1948 + {
1949 + ErrorMessage("Invalid initialization arguments!");
1950 + return;
1951 + }
1952 +
1953 +/*
1954 + I've hardcoded the cycles setting to 2000 which should provide the
1955 + 125000 ticks per second for the PI/T
1956 +
1957 + unsigned long timer_cycle;
1958 + in >> keyword >> equals >> hex >> timer_cycle;
1959 + if((!in) || (keyword != "CycleSec") || (equals != "="))
1960 + {
1961 + ErrorMessage("Invalid initialization arguments!");
1962 + return;
1963 + }
1964 + Timer::TIMER_CPU_CYCLE = timer_cycle;
1965 +*/
1966 +
1967 + Timer::TIMER_IRQ = irq;
1968 + Timer::TIMER_CPU_CYCLE = 2000;
1969 + baseAddress = base * cpu.Granularity();
1970 +
1971 + // This is needed to start the whole process. The eventhandler
1972 + // will always request an event and test to see if the user has
1973 + // enabled the timer it not nothing happens but if so. The
1974 + // CPR register is copied to the CNTR and is decremented for every
1975 + // Cycle.
1976 + (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
1977 +
1978 + Reset();
1979 +}
1980 +
1981 +///////////////////////////////////////////////////////////////////////////////
1982 +// This routine should set myInterruptPending flag and send a request
1983 +// to the CPU for an interrupt.
1984 +///////////////////////////////////////////////////////////////////////////////
1985 +void Timer::InterruptRequest(int level)
1986 +{
1987 + // If no interrupt is pending then request one
1988 + if(!myInterruptPending)
1989 + {
1990 + myInterruptPending = true;
1991 + myCPU.InterruptRequest(this, level);
1992 + }
1993 +}
1994 +
1995 +/*___________________________________________________________________________
1996 + | FUNCTIONAME: InterruptAcknowledge(int)
1997 + | DESC: This routine is called by the CPU when it processes a
1998 + | requested interrupt. It should return the vector number associated with
1999 + | the interrupt or AUTOVECTOR_INTERRUPT if the device doesn't generate
2000 + | vectors. This default routine only does autovector interrupts.
2001 + | This function is called by the CPU. The return value is usally the
2002 + | memory location of a exemption funcion. How to handel these functions
2003 + | one shold refer to a Motorla text book.
2004 + | PARAM: None
2005 + | NOTE: Vecotor codes 5 and 7 are the only masks that will make the timer
2006 + | do somthing. 5 is a VECTOR and 7 is an AUTOVECTOR. The code
2007 + | can be found in any manual.
2008 + |___________________________________________________________________________
2009 +*/
2010 +long Timer::InterruptAcknowledge(int)
2011 +{
2012 + unsigned char cTCR = timerValue[TCR];
2013 +
2014 + if(myInterruptPending)
2015 + {
2016 + switch(cTCR>>5)
2017 + {
2018 + case 5:
2019 + //By returning the address of the vector, the cpu will
2020 + //call the vector that is located in the right mem location.
2021 + myInterruptPending = false;
2022 + return timerValue[TIVR];
2023 + break;
2024 +
2025 + case 7:
2026 + myInterruptPending = false;
2027 + return AUTOVECTOR_INTERRUPT;
2028 + break;
2029 +
2030 + default:
2031 + return SPURIOUS_INTERRUPT;
2032 + }
2033 + }
2034 + else
2035 + {
2036 + return(SPURIOUS_INTERRUPT);
2037 + }
2038 +}
2039 +
2040 +/*______________________________________________________________
2041 + | METHOD: Timer::CheckMapped( unsigned long adress)
2042 + | DESC: Check to see if address mapps to device.
2043 + |______________________________________________________________
2044 +*/
2045 +bool Timer::CheckMapped(unsigned long address) const
2046 +{
2047 + return ((address >= baseAddress ) &&
2048 + (address <= baseAddress+(22*sizeof(char))));
2049 +}
2050 +
2051 +/*______________________________________________________________
2052 + | METHOD: Timer::Peek(unsigned long address)
2053 + | DESC: Returns a byte from the device's address.
2054 + |
2055 + | PEEK is the protocal that is used by the device to
2056 + | inform the CPU what the registry settings are.
2057 + | The use need not update the memory location for the CPU
2058 + | All of this is done by the cpu and thus uses peek to
2059 + | read the data that the device is using for the Memory
2060 + | (i.e. RAM)
2061 + |______________________________________________________________
2062 +*/
2063 +unsigned char Timer::Peek(unsigned long address)
2064 +{
2065 + switch((address-baseAddress))
2066 + {
2067 + case TCR:
2068 + return timerValue[TCR];
2069 + case TIVR:
2070 + return timerValue[TIVR];
2071 + case NULR:
2072 + return timerValue[NULR];
2073 + case CPRH:
2074 + return timerValue[CPRH];
2075 + case CPRM:
2076 + return timerValue[CPRM];
2077 + case CPRL:
2078 + return timerValue[CPRL];
2079 + case CNTRH:
2080 + return timerValue[CNTRH];
2081 + case CNTRM:
2082 + return timerValue[CNTRM];
2083 + case CNTRL:
2084 + return timerValue[CNTRL];
2085 + case TSR:
2086 + return timerValue[TSR];
2087 + }
2088 + return 0; //Error not a valid address.
2089 +}
2090 +
2091 +/*______________________________________________________________
2092 + | METHOD: Timer::Poke(unsigned long address, char c)
2093 + | DESC: This is the interface to the rest of the World. Here
2094 + | the CPU or anyother devece writes to memory and updates the
2095 + | device. Poke Changes the value of the registers.
2096 + | Notice that there is no way for the user to WRITE to the
2097 + | registers CNTR, this is because they are read only.
2098 + |______________________________________________________________
2099 +*/
2100 +void Timer::Poke(unsigned long address, unsigned char c)
2101 +{
2102 + switch((address-baseAddress))
2103 + {
2104 + case TCR:
2105 + timerValue[TCR]=c;
2106 + break;
2107 + case TIVR:
2108 + timerValue[TIVR]=c;
2109 + break;
2110 + case NULR:
2111 + timerValue[NULR]=c;
2112 + break;
2113 + case CPRH:
2114 + timerValue[CPRH]=c;
2115 + break;
2116 + case CPRM:
2117 + timerValue[CPRM]=c;
2118 + break;
2119 + case CPRL:
2120 + timerValue[CPRL]=c;
2121 + break;
2122 + case TSR:
2123 + timerValue[TSR]=c;
2124 + break;
2125 + }
2126 +}
2127 +
2128 +/*______________________________________________________________
2129 + | METHOD: Timer::Reset()
2130 + | DESC: Resets the timer. And Initalizes the Registers.
2131 + |______________________________________________________________
2132 +*/
2133 +void Timer::Reset()
2134 +{
2135 + // Resets the interupt handler.
2136 + myInterruptPending = false;
2137 + firstTime = true;
2138 +
2139 + // Clears the timers.
2140 + for(int i=0; i <22; i++)
2141 + timerValue[i]=0;
2142 +}
2143 +
2144 +/*______________________________________________________________
2145 + | METHOD: VetcorTimer::EventCallback(long *data, void *ptr)
2146 + | DESC: Function that executes when interupt occures.
2147 + | DEP FUNC: Requires decCNTR copyCPRtoCNTR.
2148 + |______________________________________________________________
2149 +*/
2150 +void Timer::EventCallback(long data, void *ptr)
2151 +{
2152 + unsigned char cTCR = timerValue[TCR];
2153 +
2154 + // Test to see if timer is enabled, if False(0) do nothing.
2155 + // but dispatch an event.
2156 + if((cTCR&1) == 1)
2157 + {
2158 + // This test to see if the timer has not started a
2159 + // count down. If it hasnt, copy the CPR register vaules
2160 + // to the CNTR registers.
2161 + if(firstTime == true)
2162 + {
2163 + firstTime = false;
2164 + copyCPRtoCNTR();
2165 + }
2166 +
2167 + // Decriments the CNTR if 0 then call interrupt.
2168 + // else dispatch an event.
2169 + if(decCNTR() != 0)
2170 + {
2171 + (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
2172 + return;
2173 + }
2174 +
2175 + // Since the timer is now done, set the first time to ture,
2176 + // so the next time the TCR is set to 1 it will copy the
2177 + // CPR Register to CNTR.
2178 + firstTime = true;
2179 +
2180 + // Protocal says that the TCR should flip to 0. and that
2181 + // TSR bit switches to 1. That is done below.
2182 + timerValue[TCR] = (timerValue[TCR] & 0xfe);
2183 + timerValue[TSR] = (timerValue[TSR] | 0x01);
2184 +
2185 + // Dispatch an IRQ only if user has set this in the
2186 + // TCR register. (5 and 7) are the only valid
2187 + // Interupts.
2188 + if (((cTCR>>5) & 5) || ((cTCR>>5) &7))
2189 + {
2190 + InterruptRequest(TIMER_IRQ);
2191 + }
2192 + (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
2193 + }
2194 + else
2195 + {
2196 + (myCPU.eventHandler()).Add(this, TIMER_EVENT, 0, TIMER_CPU_CYCLE);
2197 + }
2198 +}
2199 +
2200 +/*______________________________________________________________
2201 + | METHOD: CopyCPRtoCNTR
2202 + | DESC: Copies the register value of CPR to CNTR.
2203 + | USED: By funce EventCallback
2204 + | DEP FUNC: None
2205 + |______________________________________________________________
2206 +*/
2207 +void Timer::copyCPRtoCNTR()
2208 +{
2209 + timerValue[CNTRH] = timerValue[CPRH];
2210 + timerValue[CNTRM] = timerValue[CPRM];
2211 + timerValue[CNTRL] = timerValue[CPRL];
2212 +}
2213 +
2214 +/*______________________________________________________________
2215 + | METHOD: decCNTR
2216 + | DESC: decriments the counter and checks for CNTR==0
2217 + | retuns the value of CNTR.
2218 + |______________________________________________________________
2219 +*/
2220 +unsigned int Timer::decCNTR()
2221 +{
2222 + int decValue;
2223 + int temp24;
2224 +
2225 + // Grab the values of the 24bit register to a value.
2226 + decValue = 0;
2227 + temp24 = (unsigned int) timerValue[CNTRH];
2228 + decValue = (decValue | ( temp24 << 24));
2229 +
2230 + temp24 = (unsigned int) timerValue[CNTRM];
2231 + decValue = (decValue | (temp24 << 16));
2232 +
2233 + decValue = (decValue | timerValue[CNTRL]);
2234 +
2235 + decValue -= 250;
2236 + if(decValue < 0)
2237 + {
2238 + decValue = 0;
2239 + }
2240 +
2241 + // Put the value back the 24bit register to a value.
2242 + // with the decremnt.
2243 + timerValue[CNTRH] = ( unsigned char) (decValue >> 24);
2244 + timerValue[CNTRM] = ( unsigned char) (decValue >> 16);
2245 + timerValue[CNTRL] = ( unsigned char) (decValue );
2246 +
2247 + return (unsigned int) decValue;
2248 +}
2249 +
2250 diff -ur bsvc-2.1/src/sim68360/devices/Timer.hxx bsvc-2.1-fixed/src/sim68360/devices/Timer.hxx
2251 --- bsvc-2.1/src/sim68360/devices/Timer.hxx 1998-11-09 04:39:29.000000000 +0100
2252 +++ bsvc-2.1-fixed/src/sim68360/devices/Timer.hxx 2007-05-30 22:47:40.000000000 +0200
2253 @@ -23,11 +23,9 @@
2254
2255 #include <string>
2256
2257 -#ifdef USE_STD
2258 - using namespace std;
2259 -#endif
2260 +using namespace std;
2261
2262 -#include "BasicDevice.hxx"
2263 +#include "../../Framework/BasicDevice.hxx"
2264
2265 #define AUTOVECTOR_INTERRUPT -1
2266 #define SPURIOUS_INTERRUPT -2
2267 diff -ur bsvc-2.1/src/sim68360/loader/Loader.cxx bsvc-2.1-fixed/src/sim68360/loader/Loader.cxx
2268 --- bsvc-2.1/src/sim68360/loader/Loader.cxx 1998-11-09 04:39:29.000000000 +0100
2269 +++ bsvc-2.1-fixed/src/sim68360/loader/Loader.cxx 2007-05-30 22:47:40.000000000 +0200
2270 @@ -13,9 +13,9 @@
2271 // $Id: Loader.cxx,v 1.1 1996/08/06 11:53:58 bwmott Exp $
2272 ///////////////////////////////////////////////////////////////////////////////
2273
2274 -#include "AddressSpace.hxx"
2275 -#include "BasicCPU.hxx"
2276 -#include "Tools.hxx"
2277 +#include "../../Framework/AddressSpace.hxx"
2278 +#include "../../Framework/BasicCPU.hxx"
2279 +#include "../../Framework/Tools.hxx"
2280 #include "Loader.hxx"
2281
2282 ///////////////////////////////////////////////////////////////////////////////
2283 @@ -26,11 +26,7 @@
2284 string error;
2285
2286 // Open the file for reading
2287 - #ifdef WIN32
2288 - fstream file(filename, ios::in);
2289 - #else
2290 - fstream file(filename, ios::in | ios::nocreate);
2291 - #endif
2292 + fstream file(filename, ios::in);
2293
2294 // Make sure the file was opened
2295 if(file.fail())
2296 diff -ur bsvc-2.1/src/sim68360/loader/Loader.hxx bsvc-2.1-fixed/src/sim68360/loader/Loader.hxx
2297 --- bsvc-2.1/src/sim68360/loader/Loader.hxx 1998-11-09 04:39:29.000000000 +0100
2298 +++ bsvc-2.1-fixed/src/sim68360/loader/Loader.hxx 2007-05-30 22:47:40.000000000 +0200
2299 @@ -16,19 +16,12 @@
2300 #ifndef LOADER_HXX
2301 #define LOADER_HXX
2302
2303 -#ifdef WIN32
2304 - #include <iostream>
2305 - #include <fstream>
2306 -#else
2307 - #include <iostream.h>
2308 - #include <fstream.h>
2309 -#endif
2310 +#include <iostream>
2311 +#include <fstream>
2312
2313 -#ifdef USE_STD
2314 - using namespace std;
2315 -#endif
2316 +using namespace std;
2317
2318 -#include "BasicLoader.hxx"
2319 +#include "../../Framework/BasicLoader.hxx"
2320
2321 ///////////////////////////////////////////////////////////////////////////////
2322 // The Loader Class
2323 diff -ur bsvc-2.1/src/sim68360/main.cxx bsvc-2.1-fixed/src/sim68360/main.cxx
2324 --- bsvc-2.1/src/sim68360/main.cxx 1998-11-09 04:39:29.000000000 +0100
2325 +++ bsvc-2.1-fixed/src/sim68360/main.cxx 2007-05-30 22:47:40.000000000 +0200
2326 @@ -17,12 +17,12 @@
2327 // $Id: main.cxx,v 1.1 1996/08/02 14:58:12 bwmott Exp $
2328 ///////////////////////////////////////////////////////////////////////////////
2329
2330 -#include "Interface.hxx"
2331 +#include "../Framework/Interface.hxx"
2332 #include "cpu/cpu32.hxx"
2333 #include "devices/DeviceRegistry.hxx"
2334 #include "loader/Loader.hxx"
2335
2336 -main()
2337 +int main()
2338 {
2339 BasicCPU& processor = *(new cpu32);
2340 BasicLoader& loader = *(new Loader(processor));
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