src/main/drivers/at32/system_at32f43x.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdbool.h>
  22 #include <stdint.h>
  23
  24 #include "platform.h"
  25
  26 #include "drivers/exti.h"
  27 #include "drivers/nvic.h"
  28 #include "drivers/system.h"
  29 #include "drivers/persistent.h"
  30 #include "at32f435_437_clock.h"
  31
  32 // See RM_AT32F435_437_EN_V2.05.pdf reference manual table 5-6 for more info.
  33 #if 256 < TARGET_FLASH_SIZE
  34 #define USD_EOPB0_SRAM_CONFIG_MASK 0x7
  35 #else
  36 #define USD_EOPB0_SRAM_CONFIG_MASK 0x3
  37 #endif
  38
  39 static flash_usd_eopb0_type get_sram_config(void)
  40 {
  41     extern uint32_t _SRAM_SIZE; // Defined in linker file
  42     switch ((uint32_t)&_SRAM_SIZE) {
  43 #if 256 == TARGET_FLASH_SIZE
  44     case 448:
  45         return FLASH_EOPB0_SRAM_448K;
  46     case 512:
  47         return FLASH_EOPB0_SRAM_512K;
  48     case 384:
  49     default:
  50         return FLASH_EOPB0_SRAM_384K;
  51 #elif 448 == TARGET_FLASH_SIZE
  52     case 256:
  53         return FLASH_EOPB0_SRAM_256K;
  54     case 320:
  55         return FLASH_EOPB0_SRAM_320K;
  56     case 384:
  57         return FLASH_EOPB0_SRAM_384K;
  58     case 448:
  59         return FLASH_EOPB0_SRAM_448K;
  60     case 512:
  61         return FLASH_EOPB0_SRAM_512K;
  62     case 192:
  63     default:
  64         return FLASH_EOPB0_SRAM_192K;
  65 #elif 1024 <= TARGET_FLASH_SIZE
  66     case 128:
  67         return FLASH_EOPB0_SRAM_128K;
  68     case 256:
  69         return FLASH_EOPB0_SRAM_256K;
  70     case 320:
  71         return FLASH_EOPB0_SRAM_320K;
  72     case 384:
  73         return FLASH_EOPB0_SRAM_384K;
  74     case 448:
  75         return FLASH_EOPB0_SRAM_448K;
  76     case 512:
  77         return FLASH_EOPB0_SRAM_512K;
  78     case 192:
  79     default:
  80         return FLASH_EOPB0_SRAM_192K;
  81 #endif
  82     }
  83 }
  84
  85 static void init_sram_config(void)
  86 {
  87     // Make sure the SRAM config is correct
  88     const flash_usd_eopb0_type sram_cfg = get_sram_config();
  89     if (((USD->eopb0) & USD_EOPB0_SRAM_CONFIG_MASK) != sram_cfg) {
  90         flash_unlock();
  91         flash_user_system_data_erase();
  92         flash_eopb0_config(sram_cfg);
  93         systemReset();
  94     }
  95 }
  96
  97 void systemReset(void)
  98 {
  99     __disable_irq();
 100     NVIC_SystemReset();
 101 }
 102
 103 void systemResetToBootloader(bootloaderRequestType_e requestType)
 104 {
 105     switch (requestType) {
 106     case BOOTLOADER_REQUEST_ROM:
 107     default:
 108         persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_BOOTLOADER_REQUEST_ROM);
 109
 110         break;
 111     }
 112
 113     __disable_irq();
 114     NVIC_SystemReset();
 115 }
 116
 117 typedef void resetHandler_t(void);
 118
 119 typedef struct isrVector_s {
 120     __I uint32_t    stackEnd;
 121     resetHandler_t *resetHandler;
 122 } isrVector_t;
 123
 124 void checkForBootLoaderRequest(void)
 125 {
 126     volatile uint32_t bootloaderRequest = persistentObjectRead(PERSISTENT_OBJECT_RESET_REASON);
 127
 128     if (bootloaderRequest != RESET_BOOTLOADER_REQUEST_ROM) {
 129         return;
 130     }
 131     persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_NONE);
 132
 133     extern isrVector_t system_isr_vector_table_base;
 134
 135     __set_MSP(system_isr_vector_table_base.stackEnd);
 136     system_isr_vector_table_base.resetHandler();
 137     while (1);
 138 }
 139
 140 void enableGPIOPowerUsageAndNoiseReductions(void)
 141 {
 142     //enable all needed periph
 143     crm_periph_clock_enable(
 144             CRM_GPIOA_PERIPH_CLOCK    |
 145             CRM_GPIOB_PERIPH_CLOCK    |
 146             CRM_GPIOC_PERIPH_CLOCK    |
 147             CRM_GPIOD_PERIPH_CLOCK    |
 148             CRM_GPIOE_PERIPH_CLOCK    |
 149             CRM_DMA1_PERIPH_CLOCK     |
 150             CRM_DMA2_PERIPH_CLOCK     |
 151             0,TRUE);
 152 }
 153
 154 bool isMPUSoftReset(void)
 155 {
 156     if (cachedRccCsrValue & CRM_SW_RESET_FLAG)
 157         return true;
 158     else
 159         return false;
 160 }
 161
 162 void systemInit(void)
 163 {
 164     init_sram_config();
 165
 166     persistentObjectInit();
 167
 168     checkForBootLoaderRequest();
 169
 170     system_clock_config();//config system clock to 288mhz usb 48mhz
 171
 172     // Configure NVIC preempt/priority groups
 173     nvic_priority_group_config(NVIC_PRIORITY_GROUPING);
 174
 175     // cache RCC->CSR value to use it in isMPUSoftReset() and others
 176     cachedRccCsrValue = CRM->ctrlsts;
 177
 178     // Although VTOR is already loaded with a possible vector table in RAM,
 179     // removing the call to NVIC_SetVectorTable causes USB not to become active,
 180     extern uint8_t isr_vector_table_base;
 181     nvic_vector_table_set((uint32_t)&isr_vector_table_base, 0x0);
 182
 183     crm_periph_clock_enable(CRM_OTGFS2_PERIPH_CLOCK|CRM_OTGFS1_PERIPH_CLOCK,FALSE);
 184
 185     CRM->ctrlsts_bit.rstfc = TRUE;
 186
 187     enableGPIOPowerUsageAndNoiseReductions();
 188
 189     // Init cycle counter
 190     cycleCounterInit();
 191
 192     // SysTick
 193     SysTick_Config(system_core_clock / 1000);
 194 }