src/main/drivers/bus.h

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #pragma once
  22
  23 #include "platform.h"
  24
  25 #include "drivers/bus_i2c.h"
  26 #include "drivers/io_types.h"
  27 #include "drivers/dma.h"
  28
  29 typedef enum {
  30     BUS_TYPE_NONE = 0,
  31     BUS_TYPE_I2C,
  32     BUS_TYPE_SPI,
  33     BUS_TYPE_MPU_SLAVE, // Slave I2C on SPI master
  34     BUS_TYPE_GYRO_AUTO,  // Only used by acc/gyro bus auto detection code
  35 } busType_e;
  36
  37 struct spiDevice_s;
  38
  39 typedef enum {
  40     BUS_READY,
  41     BUS_BUSY,
  42     BUS_ABORT
  43 } busStatus_e;
  44
  45
  46 // Bus interface, independent of connected device
  47 typedef struct busDevice_s {
  48     busType_e busType;
  49     union {
  50         struct busSpi_s {
  51             SPI_TypeDef *instance;
  52             uint16_t speed;
  53             bool leadingEdge;
  54         } spi;
  55         struct busI2C_s {
  56             I2CDevice device;
  57         } i2c;
  58         struct busMpuSlave_s {
  59             struct extDevice_s *master;
  60         } mpuSlave;
  61     } busType_u;
  62     bool useDMA;
  63     bool useAtomicWait;
  64     uint8_t deviceCount;
  65     resourceOwner_e owner; // owner of first device to use this bus
  66     dmaChannelDescriptor_t *dmaTx;
  67     dmaChannelDescriptor_t *dmaRx;
  68     uint32_t dmaTxChannel;
  69     uint32_t dmaRxChannel;
  70 #ifndef UNIT_TEST
  71     // Use a reference here as this saves RAM for unused descriptors
  72 #if defined(USE_FULL_LL_DRIVER)
  73     LL_DMA_InitTypeDef          *initTx;
  74     LL_DMA_InitTypeDef          *initRx;
  75 #else
  76     DMA_InitTypeDef             *initTx;
  77     DMA_InitTypeDef             *initRx;
  78 #endif
  79 #endif // UNIT_TEST
  80     struct busSegment_s* volatile curSegment;
  81     bool initSegment;
  82 } busDevice_t;
  83
  84 /* Each SPI access may comprise multiple parts, for example, wait/write enable/write/data each of which
  85  * is defined by a segment, with optional callback after each is completed
  86  */
  87 typedef struct busSegment_s {
  88     uint8_t *txData;
  89     uint8_t *rxData;
  90     int len;
  91     bool negateCS; // Should CS be negated at the end of this segment
  92     busStatus_e (*callback)(uint32_t arg);
  93 } busSegment_t;
  94
  95 // External device has an associated bus and bus dependent address
  96 typedef struct extDevice_s {
  97     busDevice_t *bus;
  98     union {
  99         struct extSpi_s {
 100             uint16_t speed;
 101             IO_t csnPin;
 102             bool leadingEdge;
 103         } spi;
 104         struct extI2C_s {
 105             uint8_t address;
 106         } i2c;
 107         struct extMpuSlave_s {
 108             uint8_t address;
 109         } mpuSlave;
 110     } busType_u;
 111 #ifndef UNIT_TEST
 112     // Cache the init structure for the next DMA transfer to reduce inter-segment delay
 113 #if defined(USE_HAL_DRIVER)
 114     LL_DMA_InitTypeDef          initTx;
 115     LL_DMA_InitTypeDef          initRx;
 116 #else
 117     DMA_InitTypeDef             initTx;
 118     DMA_InitTypeDef             initRx;
 119 #endif
 120 #endif // UNIT_TEST
 121     // Support disabling DMA on a per device basis
 122     bool useDMA;
 123     // Per device buffer reference if needed
 124     uint8_t *txBuf, *rxBuf;
 125     // Connected devices on the same bus may support different speeds
 126     uint32_t callbackArg;
 127 } extDevice_t;
 128
 129
 130 #ifdef TARGET_BUS_INIT
 131 void targetBusInit(void);
 132 #endif
 133
 134 // Access routines where the register is accessed directly
 135 bool busRawWriteRegister(const extDevice_t *dev, uint8_t reg, uint8_t data);
 136 bool busRawWriteRegisterStart(const extDevice_t *dev, uint8_t reg, uint8_t data);
 137 bool busRawReadRegisterBuffer(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
 138 bool busRawReadRegisterBufferStart(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
 139 // Write routines where the register is masked with 0x7f
 140 bool busWriteRegister(const extDevice_t *dev, uint8_t reg, uint8_t data);
 141 bool busWriteRegisterStart(const extDevice_t *dev, uint8_t reg, uint8_t data);
 142 // Read routines where the register is ORed with 0x80
 143 bool busReadRegisterBuffer(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
 144 bool busReadRegisterBufferStart(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
 145 uint8_t busReadRegister(const extDevice_t *dev, uint8_t reg);
 146
 147 bool busBusy(const extDevice_t *dev, bool *error);
 148 void busDeviceRegister(const extDevice_t *dev);