2 ******************************************************************************
4 * @author MCD Application Team
7 * @brief general low level driver configuration
8 ******************************************************************************
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
19 ******************************************************************************
22 /* Define to prevent recursive inclusion -------------------------------------*/
23 #ifndef __USB_CONF__H__
24 #define __USB_CONF__H__
26 /* Includes ------------------------------------------------------------------*/
27 #include "stm32f4xx.h"
30 /** @addtogroup USB_OTG_DRIVER
34 /** @defgroup USB_CONF
35 * @brief USB low level driver configuration file
39 /** @defgroup USB_CONF_Exported_Defines
43 /* USB Core and PHY interface configuration.
44 Tip: To avoid modifying these defines each time you need to change the USB
45 configuration, you can declare the needed define in your toolchain
46 compiler preprocessor.
48 #ifndef USE_USB_OTG_FS
49 #define USE_USB_OTG_FS
50 #endif /* USE_USB_OTG_FS */
52 #ifndef USE_USB_OTG_HS
53 //#define USE_USB_OTG_HS
54 #endif /* USE_USB_OTG_HS */
58 #endif /* USE_ULPI_PHY */
60 #ifndef USE_EMBEDDED_PHY
61 //#define USE_EMBEDDED_PHY
62 #endif /* USE_EMBEDDED_PHY */
66 #endif /* USE_I2C_PHY */
70 #define USB_OTG_FS_CORE
74 #define USB_OTG_HS_CORE
77 /*******************************************************************************
78 * FIFO Size Configuration in Device mode
80 * (i) Receive data FIFO size = RAM for setup packets +
81 * OUT endpoint control information +
82 * data OUT packets + miscellaneous
83 * Space = ONE 32-bits words
84 * --> RAM for setup packets = 10 spaces
85 * (n is the nbr of CTRL EPs the device core supports)
86 * --> OUT EP CTRL info = 1 space
87 * (one space for status information written to the FIFO along with each
89 * --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
90 * (MINIMUM to receive packets)
91 * --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
92 * (if high-bandwidth EP is enabled or multiple isochronous EPs)
93 * --> miscellaneous = 1 space per OUT EP
94 * (one space for transfer complete status information also pushed to the
95 * FIFO with each endpoint's last packet)
97 * (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
98 * that particular IN EP. More space allocated in the IN EP Tx FIFO results
99 * in a better performance on the USB and can hide latencies on the AHB.
101 * (iii) TXn min size = 16 words. (n : Transmit FIFO index)
102 * (iv) When a TxFIFO is not used, the Configuration should be as follows:
103 * case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
104 * --> Txm can use the space allocated for Txn.
105 * case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
106 * --> Txn should be configured with the minimum space of 16 words
107 * (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
108 * of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
109 *******************************************************************************/
111 /*******************************************************************************
112 * FIFO Size Configuration in Host mode
114 * (i) Receive data FIFO size = (Largest Packet Size / 4) + 1 or
115 * 2x (Largest Packet Size / 4) + 1, If a
116 * high-bandwidth channel or multiple isochronous
117 * channels are enabled
119 * (ii) For the host nonperiodic Transmit FIFO is the largest maximum packet size
120 * for all supported nonperiodic OUT channels. Typically, a space
121 * corresponding to two Largest Packet Size is recommended.
123 * (iii) The minimum amount of RAM required for Host periodic Transmit FIFO is
124 * the largest maximum packet size for all supported periodic OUT channels.
125 * If there is at least one High Bandwidth Isochronous OUT endpoint,
126 * then the space must be at least two times the maximum packet size for
128 *******************************************************************************/
130 /****************** USB OTG HS CONFIGURATION **********************************/
131 #ifdef USB_OTG_HS_CORE
132 #define RX_FIFO_HS_SIZE 512
133 #define TX0_FIFO_HS_SIZE 512
134 #define TX1_FIFO_HS_SIZE 512
135 #define TX2_FIFO_HS_SIZE 0
136 #define TX3_FIFO_HS_SIZE 0
137 #define TX4_FIFO_HS_SIZE 0
138 #define TX5_FIFO_HS_SIZE 0
139 #define TXH_NP_HS_FIFOSIZ 96
140 #define TXH_P_HS_FIFOSIZ 96
142 //#define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
143 //#define USB_OTG_HS_SOF_OUTPUT_ENABLED
145 //#define USB_OTG_INTERNAL_VBUS_ENABLED
146 #define USB_OTG_EXTERNAL_VBUS_ENABLED
149 #define USB_OTG_ULPI_PHY_ENABLED
151 #ifdef USE_EMBEDDED_PHY
152 #define USB_OTG_EMBEDDED_PHY_ENABLED
155 #define USB_OTG_I2C_PHY_ENABLED
157 #define USB_OTG_HS_INTERNAL_DMA_ENABLED
158 #define USB_OTG_HS_DEDICATED_EP1_ENABLED
161 /****************** USB OTG FS CONFIGURATION **********************************/
162 #ifdef USB_OTG_FS_CORE
163 #define RX_FIFO_FS_SIZE 128
164 #define TX0_FIFO_FS_SIZE 32
165 #define TX1_FIFO_FS_SIZE 64
166 #define TX2_FIFO_FS_SIZE 0
167 #define TX3_FIFO_FS_SIZE 64
169 //#define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
170 //#define USB_OTG_FS_SOF_OUTPUT_ENABLED
173 /****************** USB OTG MODE CONFIGURATION ********************************/
174 //#define USE_HOST_MODE
175 #define USE_DEVICE_MODE
176 //#define USE_OTG_MODE
179 #ifndef USB_OTG_FS_CORE
180 #ifndef USB_OTG_HS_CORE
181 #error "USB_OTG_HS_CORE or USB_OTG_FS_CORE should be defined"
186 #ifndef USE_DEVICE_MODE
187 #ifndef USE_HOST_MODE
188 #error "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
192 #ifndef USE_USB_OTG_HS
193 #ifndef USE_USB_OTG_FS
194 #error "USE_USB_OTG_HS or USE_USB_OTG_FS should be defined"
196 #else //USE_USB_OTG_HS
198 #ifndef USE_EMBEDDED_PHY
200 #error "USE_ULPI_PHY or USE_EMBEDDED_PHY or USE_I2C_PHY should be defined"
206 /****************** C Compilers dependant keywords ****************************/
207 /* In HS mode and when the DMA is used, all variables and data structures dealing
208 with the DMA during the transaction process should be 4-bytes aligned */
209 #ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
210 #if defined (__GNUC__) /* GNU Compiler */
211 #define __ALIGN_END __attribute__ ((aligned (4)))
212 #define __ALIGN_BEGIN
215 #if defined (__CC_ARM) /* ARM Compiler */
216 #define __ALIGN_BEGIN __align(4)
217 #elif defined (__ICCARM__) /* IAR Compiler */
218 #define __ALIGN_BEGIN
219 #elif defined (__TASKING__) /* TASKING Compiler */
220 #define __ALIGN_BEGIN __align(4)
221 #endif /* __CC_ARM */
222 #endif /* __GNUC__ */
224 #define __ALIGN_BEGIN
226 #endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
228 /* __packed keyword used to decrease the data type alignment to 1-byte */
229 #if defined (__CC_ARM) /* ARM Compiler */
230 #define __packed __packed
231 #elif defined (__ICCARM__) /* IAR Compiler */
232 #define __packed __packed
233 #elif defined ( __GNUC__ ) /* GNU Compiler */
235 #define __packed __attribute__ ((__packed__))
237 #elif defined (__TASKING__) /* TASKING Compiler */
238 #define __packed __unaligned
239 #endif /* __CC_ARM */
246 /** @defgroup USB_CONF_Exported_Types
254 /** @defgroup USB_CONF_Exported_Macros
261 /** @defgroup USB_CONF_Exported_Variables
268 /** @defgroup USB_CONF_Exported_FunctionsPrototype
276 #endif //__USB_CONF__H__
286 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/