| commit | 167bd0f3d06ea9422402976ca93ef58d1947a0bc | |
| author | Mark Haslinghuis <mark@numloq.nl> | |
| Fri, 12 May 2023 21:39:00 +0000 (12 23:39 +0200) | ||
| committer | GitHub <noreply@github.com> | |
| Fri, 12 May 2023 21:39:00 +0000 (12 23:39 +0200) | ||
| tree | 72c1fae06e9e52068c49767f7079f093e2c865d4 | treesnapshot (tar.gz zip) |
| parent | 5a737a47e0db6ea497cbcf3904cd0a6336f4a054 | commitdiff |
[4.4.2] If CS is asserted between transfers then consider bus to be busy for … (#12784)
If CS is asserted between transfers then consider bus to be busy for all but owning device (#12604)
* If CS is asserted between transfers then consider bus to be busy for all but owning device
* Track if MAX7456 is mid DMA transfer, not simply that the SPI bus is busy
* Enable SPI DMA TX/RX together
Co-authored-by: Steve Evans <SteveCEvans@users.noreply.github.com>
If CS is asserted between transfers then consider bus to be busy for all but owning device (#12604)
* If CS is asserted between transfers then consider bus to be busy for all but owning device
* Track if MAX7456 is mid DMA transfer, not simply that the SPI bus is busy
* Enable SPI DMA TX/RX together
Co-authored-by: Steve Evans <SteveCEvans@users.noreply.github.com>
| src/main/drivers/bus.h | diffblobblamehistory | |
| src/main/drivers/bus_spi.c | diffblobblamehistory | |
| src/main/drivers/bus_spi_ll.c | diffblobblamehistory | |
| src/main/drivers/max7456.c | diffblobblamehistory |