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Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu.
[binutils-gdb.git]
/
ld
/
testsuite
/
ld-aarch64
/
erratum835769.s
blob
d57b5ab814d078dcea9c482522e6747da3128fc2
1
.text
2
.align 2
3
.global main
4
.type main, %function
5
main
:
6
stp x29
,
x30
, [
sp
, -
32
]!
7
add
x29
,
sp
,
0
8
mov x0
, -
26
9
str x0
, [
x29
,
16
]
10
mov x0
,
26
11
str x0
, [
x29
,
24
]
12
add
x4
,
x29
,
16
13
mov x0
, -
1
14
mov x1
,
2
15
mov x2
, -
3
16
mov x3
,
4
17
bl
a1ldr
18
add
x4
,
x29
,
16
19
mov x0
, -
1
20
mov x1
,
2
21
mov x2
, -
3
22
mov x3
,
4
23
bl
a5ldr
24
mov w0
,
0
25
ldp x29
,
x30
, [
sp
],
32
26
ret
27
.size main, .-main
28
29
.align 2
30
.global a1ldr
31
.type a1ldr, %function
32
a1ldr
:
33
ldr w7
, [
x4
,
8
]!
34
mul
w6
,
w0
,
w1
35
ldr x4
, [
x4
]
36
madd x5
,
x2
,
x3
,
x6
37
mov x0
,
x5
38
ret
39
.size a1ldr, .-a1ldr
40
41
.align 2
42
.global a5ldr
43
.type a5ldr, %function
44
a5ldr
:
45
ldr w7
, [
x4
,
8
]!
46
mul
w6
,
w0
,
w1
47
ldr x4
, [
x4
]
48
umaddl x5
,
w2
,
w3
,
x6
49
mov x0
,
x5
50
ret
51
.size a5ldr, .-a5ldr
52
53
.align 2
54
.global a6ldr
55
.type a6ldr, %function
56
a6ldr
:
57
ldr w7
, [
x4
,
8
]!
58
mul
w6
,
w0
,
w1
59
ldr x4
, [
x4
]
60
madd x5
,
x4
,
x3
,
x6
61
mov x0
,
x5
62
ret
63
.size a6ldr, .-a6ldr
64
65
.align 2
66
.global a6ldr
67
.type a6ldr, %function
68
a7str
:
69
ldr w7
, [
x4
,
8
]!
70
mul
w6
,
w0
,
w1
71
str x4
, [
x4
]
72
madd x5
,
x4
,
x3
,
x6
73
mov x0
,
x5
74
ret
75
.size a7str, .-a7str