Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu.
[binutils-gdb.git] / ld / testsuite / ld-frv / tls-shared-3.d
blobc4eed38035b7c9fb2dad89eb48fe4e2b4ed4771c
1 #name: FRV TLS undefweak relocs, shared linking
2 #source: tls-3.s
3 #objdump: -DR -j .text -j .got -j .plt
4 #ld: -shared
6 .*: file format elf.*frv.*
8 Disassembly of section \.text:
10 [0-9a-f ]+<_start>:
11 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9
12 [0-9a-f ]+: 00 88 00 00 nop\.p
13 [0-9a-f ]+: 80 88 00 00 nop
14 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9
15 [0-9a-f ]+: 80 88 00 00 nop
16 [0-9a-f ]+: 12 c8 f0 0c ldi\.p @\(gr15,12\),gr9
17 [0-9a-f ]+: 80 88 00 00 nop
18 [0-9a-f ]+: 80 88 00 00 nop
19 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9
20 [0-9a-f ]+: 00 88 00 00 nop\.p
21 [0-9a-f ]+: 80 88 00 00 nop
22 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9
23 Disassembly of section \.got:
25 [0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>:
26 \.\.\.
27 [0-9a-f ]+: R_FRV_TLSOFF u