ld/testsuite/ld-powerpc/notoc.d

   1 #source: notoc.s
   2 #as: -a64
   3 #ld: --no-plt-localentry --no-power10-stubs -T ext.lnk
   4 #objdump: -d
   5 #target: powerpc64*-*-*
   6
   7 .*
   8
   9 Disassembly of section \.text:
  10
  11 .* <.*\.long_branch\.f1>:
  12 .*:     (18 00 41 f8|f8 41 00 18)       std     r2,24\(r1\)
  13 .*:     (7c 00 00 48|48 00 00 7c)       b       .* <f1>
  14
  15 .* <.*\.long_branch\.g1>:
  16 .*:     (18 00 41 f8|f8 41 00 18)       std     r2,24\(r1\)
  17 .*:     (8c 00 00 48|48 00 00 8c)       b       .* <g1>
  18 #...
  19 .* <.*\.plt_branch\.ext>:
  20 .*:     (a6 02 88 7d|7d 88 02 a6)       mflr    r12
  21 .*:     (05 00 9f 42|42 9f 00 05)       bcl     .*
  22 .*:     (a6 02 68 7d|7d 68 02 a6)       mflr    r11
  23 .*:     (a6 03 88 7d|7d 88 03 a6)       mtlr    r12
  24 .*:     (ff 7f 80 3d|3d 80 7f ff)       lis     r12,32767
  25 .*:     (ff ff 8c 61|61 8c ff ff)       ori     r12,r12,65535
  26 .*:     (c6 07 9c 79|79 9c 07 c6)       sldi    r28,r12,32
  27 .*:     (ff ef 8c 65|65 8c ef ff)       oris    r12,r12,61439
  28 .*:     (18 ff 8c 61|61 8c ff 18)       ori     r12,r12,65304
  29 .*:     (14 62 8b 7d|7d 8b 62 14)       add     r12,r11,r12
  30 .*:     (a6 03 89 7d|7d 89 03 a6)       mtctr   r12
  31 .*:     (20 04 80 4e|4e 80 04 20)       bctr
  32
  33 .* <.*\.long_branch\.f2>:
  34 .*:     (a6 02 88 7d|7d 88 02 a6)       mflr    r12
  35 .*:     (05 00 9f 42|42 9f 00 05)       bcl     .*
  36 .*:     (a6 02 68 7d|7d 68 02 a6)       mflr    r11
  37 .*:     (a6 03 88 7d|7d 88 03 a6)       mtlr    r12
  38 .*:     (54 00 8b 39|39 8b 00 54)       addi    r12,r11,84
  39 .*:     (.. .. 00 48|48 00 .. ..)       b       .* <f2>
  40
  41 .* <.*\.long_branch\.g2>:
  42 .*:     (a6 02 88 7d|7d 88 02 a6)       mflr    r12
  43 .*:     (05 00 9f 42|42 9f 00 05)       bcl     .*
  44 .*:     (a6 02 68 7d|7d 68 02 a6)       mflr    r11
  45 .*:     (a6 03 88 7d|7d 88 03 a6)       mtlr    r12
  46 .*:     (70 00 8b 39|39 8b 00 70)       addi    r12,r11,112
  47 .*:     (.. .. 00 48|48 00 .. ..)       b       .* <g2>
  48 #...
  49 .* <f1>:
  50 .*:     (01 00 00 48|48 00 00 01)       bl      .* <f1>
  51 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.f2>
  52 .*:     (.. .. 00 48|48 00 .. ..)       bl      .* <g1>
  53 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.g2>
  54 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.plt_branch\.ext>
  55 .*:     (20 00 80 4e|4e 80 00 20)       blr
  56
  57 .* <g1>:
  58 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.f2>
  59 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <f1>
  60 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.g2>
  61 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <g1>
  62 .*:     (20 00 80 4e|4e 80 00 20)       blr
  63
  64 .* <f2>:
  65 .*:     (01 10 40 3c|3c 40 10 01)       lis     r2,4097
  66 .*:     (00 80 42 38|38 42 80 00)       addi    r2,r2,-32768
  67 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.f1>
  68 .*:     (18 00 41 e8|e8 41 00 18)       ld      r2,24\(r1\)
  69 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <f2\+0x8>
  70 .*:     (00 00 00 60|60 00 00 00)       nop
  71 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.g1>
  72 .*:     (18 00 41 e8|e8 41 00 18)       ld      r2,24\(r1\)
  73 .*:     (.. .. 00 48|48 00 .. ..)       bl      .* <g2\+0x8>
  74 .*:     (00 00 00 60|60 00 00 00)       nop
  75 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.plt_branch\.ext>
  76 .*:     (00 00 00 60|60 00 00 00)       nop
  77 .*:     (20 00 80 4e|4e 80 00 20)       blr
  78
  79 .* <g2>:
  80 .*:     (01 10 40 3c|3c 40 10 01)       lis     r2,4097
  81 .*:     (00 80 42 38|38 42 80 00)       addi    r2,r2,-32768
  82 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <f2\+0x8>
  83 .*:     (00 00 00 60|60 00 00 00)       nop
  84 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.f1>
  85 .*:     (18 00 41 e8|e8 41 00 18)       ld      r2,24\(r1\)
  86 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <g2\+0x8>
  87 .*:     (00 00 00 60|60 00 00 00)       nop
  88 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.g1>
  89 .*:     (18 00 41 e8|e8 41 00 18)       ld      r2,24\(r1\)
  90 .*:     (20 00 80 4e|4e 80 00 20)       blr
  91
  92 .* <_start>:
  93 .*:     (00 00 00 48|48 00 00 00)       b       .* <_start>
  94
  95 Disassembly of section \.text\.ext:
  96
  97 8000000000000000 <ext>:
  98 8000000000000000:       (01 10 40 3c|3c 40 10 01)       lis     r2,4097
  99 8000000000000004:       (00 80 42 38|38 42 80 00)       addi    r2,r2,-32768
 100 8000000000000008:       (00 00 00 60|60 00 00 00)       nop
 101 800000000000000c:       (20 00 80 4e|4e 80 00 20)       blr