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[binutils-gdb.git] / gdb / ppc-ravenscar-thread.c
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1 /* Ravenscar PowerPC target support.
3 Copyright (C) 2011-2022 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "defs.h"
21 #include "gdbcore.h"
22 #include "regcache.h"
23 #include "ppc-tdep.h"
24 #include "inferior.h"
25 #include "ravenscar-thread.h"
26 #include "ppc-ravenscar-thread.h"
28 #define NO_OFFSET -1
30 /* See ppc-tdep.h for register numbers. */
32 static const int powerpc_context_offsets[] =
34 /* R0 - R32 */
35 NO_OFFSET, 0, 4, NO_OFFSET,
36 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
37 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
38 NO_OFFSET, 8, 12, 16,
39 20, 24, 28, 32,
40 36, 40, 44, 48,
41 52, 56, 60, 64,
42 68, 72, 76, 80,
44 /* F0 - F31 */
45 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
46 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
47 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
48 NO_OFFSET, NO_OFFSET, 96, 104,
49 112, 120, 128, 136,
50 144, 152, 160, 168,
51 176, 184, 192, 200,
52 208, 216, 224, 232,
54 /* PC, MSR, CR, LR */
55 88, NO_OFFSET, 84, NO_OFFSET,
57 /* CTR, XER, FPSCR */
58 NO_OFFSET, NO_OFFSET, 240
61 static const int e500_context_offsets[] =
63 /* R0 - R32 */
64 NO_OFFSET, 4, 12, NO_OFFSET,
65 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
66 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
67 NO_OFFSET, 20, 28, 36,
68 44, 52, 60, 68,
69 76, 84, 92, 100,
70 108, 116, 124, 132,
71 140, 148, 156, 164,
73 /* F0 - F31 */
74 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
75 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
76 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
77 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
78 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
79 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
80 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
81 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
83 /* PC, MSR, CR, LR */
84 172, NO_OFFSET, 168, NO_OFFSET,
86 /* CTR, XER, FPSCR, MQ */
87 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
89 /* Upper R0-R32. */
90 NO_OFFSET, 0, 8, NO_OFFSET,
91 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
92 NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
93 NO_OFFSET, 16, 24, 32,
94 40, 48, 56, 64,
95 72, 80, 88, 96,
96 104, 112, 120, 128,
97 136, 144, 152, 160,
99 /* ACC, FSCR */
100 NO_OFFSET, 176
103 /* The ravenscar_arch_ops vector for most PowerPC targets. */
105 static struct ravenscar_arch_ops ppc_ravenscar_powerpc_ops
106 (powerpc_context_offsets);
108 /* Register ppc_ravenscar_powerpc_ops in GDBARCH. */
110 void
111 register_ppc_ravenscar_ops (struct gdbarch *gdbarch)
113 set_gdbarch_ravenscar_ops (gdbarch, &ppc_ravenscar_powerpc_ops);
116 /* The ravenscar_arch_ops vector for E500 targets. */
118 static struct ravenscar_arch_ops ppc_ravenscar_e500_ops (e500_context_offsets);
120 /* Register ppc_ravenscar_e500_ops in GDBARCH. */
122 void
123 register_e500_ravenscar_ops (struct gdbarch *gdbarch)
125 set_gdbarch_ravenscar_ops (gdbarch, &ppc_ravenscar_e500_ops);