ld/testsuite/ld-m68k/plt1-cpu32.d

   1
   2 .*:     file format elf32-m68k
   3
   4 Disassembly of section \.plt:
   5
   6 00020800 <.plt>:
   7    20800:       2f3b 0170 0000  movel %pc@\(30404 <_GLOBAL_OFFSET_TABLE_\+0x4>\),%sp@-
   8    20806:       fc02
   9    20808:       227b 0170 0000  moveal %pc@\(30408 <_GLOBAL_OFFSET_TABLE_\+0x8>\),%a1
  10    2080e:       fbfe
  11    20810:       4ed1            jmp %a1@
  12    20812:       0000 0000       orib #0,%d0
  13         \.\.\.
  14
  15 00020818 <f.@plt>:
  16    20818:       227b 0170 0000  moveal %pc@\(3040c <f3>\),%a1
  17    2081e:       fbf2
  18    20820:       4ed1            jmp %a1@
  19    20822:       2f3c 0000 0000  movel #0,%sp@-
  20    20828:       60ff ffff ffd6  bral 20800 <.plt>
  21         \.\.\.
  22
  23 00020830 <f.@plt>:
  24    20830:       227b 0170 0000  moveal %pc@\(30410 <f2>\),%a1
  25    20836:       fbde
  26    20838:       4ed1            jmp %a1@
  27    2083a:       2f3c 0000 000c  movel #12,%sp@-
  28    20840:       60ff ffff ffbe  bral 20800 <.plt>
  29         \.\.\.
  30
  31 00020848 <f.@plt>:
  32    20848:       227b 0170 0000  moveal %pc@\(30414 <f1>\),%a1
  33    2084e:       fbca
  34    20850:       4ed1            jmp %a1@
  35    20852:       2f3c 0000 0018  movel #24,%sp@-
  36    20858:       60ff ffff ffa6  bral 20800 <.plt>
  37         \.\.\.
  38 Disassembly of section \.text:
  39
  40 00020c00 <.*>:
  41    20c00:       61ff ffff fc..  bsrl 208.. <f1@plt>
  42    20c06:       61ff ffff fc..  bsrl 208.. <f2@plt>
  43    20c0c:       61ff ffff fc..  bsrl 208.. <f3@plt>