[binutils, ARM, 4/16] BF insns infrastructure with array of relocs in struct arm_it
[binutils-gdb.git] / sim / mn10300 / sim-main.h
blobec745b9749bbc8833cc259d00692a8c6f71c3113
1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
4 Copyright (C) 1997-2019 Free Software Foundation, Inc.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #ifndef SIM_MAIN_H
23 #define SIM_MAIN_H
25 #define SIM_ENGINE_HALT_HOOK(SD,LAST_CPU,CIA) 0 /* disable this hook */
27 #include "sim-basics.h"
28 #include "sim-signal.h"
30 #include <signal.h> /* For kill() in insns:do_trap */
32 #include <errno.h>
33 #ifdef HAVE_UNISTD_H
34 #include <unistd.h>
35 #endif
37 /* These are generated files. */
38 #include "itable.h"
39 #include "idecode.h"
41 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
42 mn10300_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
45 #include "sim-base.h"
47 #include "mn10300_sim.h"
49 /* Bring data in from the cold */
51 #define IMEM8(EA) \
52 (sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA)))
54 #define IMEM8_IMMED(EA, N) \
55 (sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA) + (N)))
58 /* FIXME: For moment, save/restore PC value found in struct State.
59 Struct State will one day go away, being placed in the sim_cpu
60 state. */
62 struct _sim_cpu {
63 sim_event *pending_nmi;
64 sim_cia cia;
65 sim_cpu_base base;
69 struct sim_state {
71 /* the processors proper */
72 sim_cpu *cpu[MAX_NR_PROCESSORS];
74 /* The base class. */
75 sim_state_base base;
79 /* For compatibility, until all functions converted to passing
80 SIM_DESC as an argument */
81 extern SIM_DESC simulator;
83 /* (re) initialize the simulator */
85 extern void engine_init(SIM_DESC sd);
86 extern SIM_CORE_SIGNAL_FN mn10300_core_signal;
88 #endif