sim/common/dv-cfi.h

   1 /* Common Flash Memory Interface (CFI) model.
   2
   3    Copyright (C) 2010-2019 Free Software Foundation, Inc.
   4    Contributed by Analog Devices, Inc.
   5
   6    This file is part of simulators.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef DV_CFI_H
  22 #define DV_CFI_H
  23
  24 /* CFI standard.  */
  25 #define CFI_CMD_CFI_QUERY               0x98
  26 #define CFI_ADDR_CFI_QUERY_START        0x55
  27 #define CFI_ADDR_CFI_QUERY_RESULT       0x10
  28
  29 #define CFI_CMD_READ                    0xFF
  30 #define CFI_CMD_RESET                   0xF0
  31 #define CFI_CMD_READ_ID                 0x90
  32
  33 /* Intel specific.  */
  34 #define CFI_CMDSET_INTEL                0x0001
  35 #define INTEL_CMD_STATUS_CLEAR          0x50
  36 #define INTEL_CMD_STATUS_READ           0x70
  37 #define INTEL_CMD_WRITE                 0x40
  38 #define INTEL_CMD_WRITE_ALT             0x10
  39 #define INTEL_CMD_WRITE_BUFFER          0xE8
  40 #define INTEL_CMD_WRITE_BUFFER_CONFIRM  0xD0
  41 #define INTEL_CMD_LOCK_SETUP            0x60
  42 #define INTEL_CMD_LOCK_BLOCK            0x01
  43 #define INTEL_CMD_UNLOCK_BLOCK          0xD0
  44 #define INTEL_CMD_LOCK_DOWN_BLOCK       0x2F
  45 #define INTEL_CMD_ERASE_BLOCK           0x20
  46 #define INTEL_CMD_ERASE_CONFIRM         0xD0
  47
  48 /* Intel Status Register bits.  */
  49 #define INTEL_SR_BWS            (1 << 0)        /* BEFP Write.  */
  50 #define INTEL_SR_BLS            (1 << 1)        /* Block Locked.  */
  51 #define INTEL_SR_PSS            (1 << 2)        /* Program Suspend.  */
  52 #define INTEL_SR_VPPS           (1 << 3)        /* Vpp.  */
  53 #define INTEL_SR_PS             (1 << 4)        /* Program.  */
  54 #define INTEL_SR_ES             (1 << 5)        /* Erase.  */
  55 #define INTEL_SR_ESS            (1 << 6)        /* Erase Suspend.  */
  56 #define INTEL_SR_DWS            (1 << 7)        /* Device Write.  */
  57
  58 #define INTEL_ID_MANU           0x89
  59
  60 #endif