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[binutils-gdb/blckswan.git] / gdb / h8300-tdep.c
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1 /* Target-machine dependent code for Renesas H8/300, for GDB.
3 Copyright (C) 1988-2022 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 Contributed by Steve Chamberlain
22 sac@cygnus.com
25 #include "defs.h"
26 #include "value.h"
27 #include "arch-utils.h"
28 #include "regcache.h"
29 #include "gdbcore.h"
30 #include "objfiles.h"
31 #include "dis-asm.h"
32 #include "dwarf2/frame.h"
33 #include "frame-base.h"
34 #include "frame-unwind.h"
36 enum gdb_regnum
38 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
39 E_RET0_REGNUM = E_R0_REGNUM,
40 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
41 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
42 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
43 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
44 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
45 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
46 E_SP_REGNUM,
47 E_CCR_REGNUM,
48 E_PC_REGNUM,
49 E_CYCLES_REGNUM,
50 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
51 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
52 E_INSTS_REGNUM,
53 E_MACH_REGNUM,
54 E_MACL_REGNUM,
55 E_SBR_REGNUM,
56 E_VBR_REGNUM
59 #define H8300_MAX_NUM_REGS 18
61 #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
62 #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
64 struct h8300_frame_cache
66 /* Base address. */
67 CORE_ADDR base;
68 CORE_ADDR sp_offset;
69 CORE_ADDR pc;
71 /* Flag showing that a frame has been created in the prologue code. */
72 int uses_fp;
74 /* Saved registers. */
75 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
76 CORE_ADDR saved_sp;
79 enum
81 h8300_reg_size = 2,
82 h8300h_reg_size = 4,
83 h8300_max_reg_size = 4,
86 static int is_h8300hmode (struct gdbarch *gdbarch);
87 static int is_h8300smode (struct gdbarch *gdbarch);
88 static int is_h8300sxmode (struct gdbarch *gdbarch);
89 static int is_h8300_normal_mode (struct gdbarch *gdbarch);
91 #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
92 && !is_h8300_normal_mode (gdbarch)) \
93 ? h8300h_reg_size : h8300_reg_size)
95 /* Normal frames. */
97 /* Allocate and initialize a frame cache. */
99 static void
100 h8300_init_frame_cache (struct gdbarch *gdbarch,
101 struct h8300_frame_cache *cache)
103 int i;
105 /* Base address. */
106 cache->base = 0;
107 cache->sp_offset = 0;
108 cache->pc = 0;
110 /* Frameless until proven otherwise. */
111 cache->uses_fp = 0;
113 /* Saved registers. We initialize these to -1 since zero is a valid
114 offset (that's where %fp is supposed to be stored). */
115 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
116 cache->saved_regs[i] = -1;
119 #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
120 #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
121 #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
122 #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
123 #define IS_MOVB_EXT(x) ((x) == 0x7860)
124 #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
125 #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
126 #define IS_MOVW_EXT(x) ((x) == 0x78e0)
127 #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
128 /* Same instructions as mov.w, just prefixed with 0x0100. */
129 #define IS_MOVL_PRE(x) ((x) == 0x0100)
130 #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
131 #define IS_MOVL_EXT(x) ((x) == 0x78e0)
132 #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
134 #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
135 #define IS_PUSH_FP(x) ((x) == 0x01006df6)
136 #define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
137 #define IS_SUB2_SP(x) ((x) == 0x1b87)
138 #define IS_SUB4_SP(x) ((x) == 0x1b97)
139 #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
140 #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
141 #define IS_SUBL4_SP(x) ((x) == 0x1acf)
142 #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
143 #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
144 #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
145 #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
147 /* If the instruction at PC is an argument register spill, return its
148 length. Otherwise, return zero.
150 An argument register spill is an instruction that moves an argument
151 from the register in which it was passed to the stack slot in which
152 it really lives. It is a byte, word, or longword move from an
153 argument register to a negative offset from the frame pointer.
155 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
156 is used, it could be a byte, word or long move to registers r3-r5. */
158 static int
159 h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc)
161 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
162 int w = read_memory_unsigned_integer (pc, 2, byte_order);
164 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
165 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
166 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
167 return 2;
169 if (IS_MOVB_Rn16_SP (w)
170 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
172 /* ... and d:16 is negative. */
173 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
174 return 4;
176 else if (IS_MOVB_EXT (w))
178 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2,
179 2, byte_order)))
181 ULONGEST disp = read_memory_unsigned_integer (pc + 4, 4, byte_order);
183 /* ... and d:24 is negative. */
184 if ((disp & 0x00800000) != 0)
185 return 8;
188 else if (IS_MOVW_Rn16_SP (w)
189 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
191 /* ... and d:16 is negative. */
192 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
193 return 4;
195 else if (IS_MOVW_EXT (w))
197 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2,
198 2, byte_order)))
200 ULONGEST disp = read_memory_unsigned_integer (pc + 4, 4, byte_order);
202 /* ... and d:24 is negative. */
203 if ((disp & 0x00800000) != 0)
204 return 8;
207 else if (IS_MOVL_PRE (w))
209 int w2 = read_memory_integer (pc + 2, 2, byte_order);
211 if (IS_MOVL_Rn16_SP (w2)
212 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
214 /* ... and d:16 is negative. */
215 if (read_memory_integer (pc + 4, 2, byte_order) < 0)
216 return 6;
218 else if (IS_MOVL_EXT (w2))
220 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order)))
222 ULONGEST disp = read_memory_unsigned_integer (pc + 6, 4,
223 byte_order);
225 /* ... and d:24 is negative. */
226 if ((disp & 0x00800000) != 0)
227 return 10;
232 return 0;
235 /* Do a full analysis of the prologue at PC and update CACHE
236 accordingly. Bail out early if CURRENT_PC is reached. Return the
237 address where the analysis stopped.
239 We handle all cases that can be generated by gcc.
241 For allocating a stack frame:
243 mov.w r6,@-sp
244 mov.w sp,r6
245 mov.w #-n,rN
246 add.w rN,sp
248 mov.w r6,@-sp
249 mov.w sp,r6
250 subs #2,sp
251 (repeat)
253 mov.l er6,@-sp
254 mov.l sp,er6
255 add.l #-n,sp
257 mov.w r6,@-sp
258 mov.w sp,r6
259 subs #4,sp
260 (repeat)
262 For saving registers:
264 mov.w rN,@-sp
265 mov.l erN,@-sp
266 stm.l reglist,@-sp
270 static CORE_ADDR
271 h8300_analyze_prologue (struct gdbarch *gdbarch,
272 CORE_ADDR pc, CORE_ADDR current_pc,
273 struct h8300_frame_cache *cache)
275 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
276 unsigned int op;
277 int regno, i, spill_size;
279 cache->sp_offset = 0;
281 if (pc >= current_pc)
282 return current_pc;
284 op = read_memory_unsigned_integer (pc, 4, byte_order);
286 if (IS_PUSHFP_MOVESPFP (op))
288 cache->saved_regs[E_FP_REGNUM] = 0;
289 cache->uses_fp = 1;
290 pc += 4;
292 else if (IS_PUSH_FP (op))
294 cache->saved_regs[E_FP_REGNUM] = 0;
295 pc += 4;
296 if (pc >= current_pc)
297 return current_pc;
298 op = read_memory_unsigned_integer (pc, 2, byte_order);
299 if (IS_MOV_SP_FP (op))
301 cache->uses_fp = 1;
302 pc += 2;
306 while (pc < current_pc)
308 op = read_memory_unsigned_integer (pc, 2, byte_order);
309 if (IS_SUB2_SP (op))
311 cache->sp_offset += 2;
312 pc += 2;
314 else if (IS_SUB4_SP (op))
316 cache->sp_offset += 4;
317 pc += 2;
319 else if (IS_ADD_IMM_SP (op))
321 cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order);
322 pc += 4;
324 else if (IS_SUB_IMM_SP (op))
326 cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order);
327 pc += 4;
329 else if (IS_SUBL4_SP (op))
331 cache->sp_offset += 4;
332 pc += 2;
334 else if (IS_MOV_IMM_Rn (op))
336 int offset = read_memory_integer (pc + 2, 2, byte_order);
337 regno = op & 0x000f;
338 op = read_memory_unsigned_integer (pc + 4, 2, byte_order);
339 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
341 cache->sp_offset -= offset;
342 pc += 6;
344 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
346 cache->sp_offset += offset;
347 pc += 6;
349 else
350 break;
352 else if (IS_PUSH (op))
354 regno = op & 0x000f;
355 cache->sp_offset += 2;
356 cache->saved_regs[regno] = cache->sp_offset;
357 pc += 2;
359 else if (op == 0x0100)
361 op = read_memory_unsigned_integer (pc + 2, 2, byte_order);
362 if (IS_PUSH (op))
364 regno = op & 0x000f;
365 cache->sp_offset += 4;
366 cache->saved_regs[regno] = cache->sp_offset;
367 pc += 4;
369 else
370 break;
372 else if ((op & 0xffcf) == 0x0100)
374 int op1;
375 op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order);
376 if (IS_PUSH (op1))
378 /* Since the prefix is 0x01x0, this is not a simple pushm but a
379 stm.l reglist,@-sp */
380 i = ((op & 0x0030) >> 4) + 1;
381 regno = op1 & 0x000f;
382 for (; i > 0; regno++, --i)
384 cache->sp_offset += 4;
385 cache->saved_regs[regno] = cache->sp_offset;
387 pc += 4;
389 else
390 break;
392 else
393 break;
396 /* Check for spilling an argument register to the stack frame.
397 This could also be an initializing store from non-prologue code,
398 but I don't think there's any harm in skipping that. */
399 while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0
400 && pc + spill_size <= current_pc)
401 pc += spill_size;
403 return pc;
406 static struct h8300_frame_cache *
407 h8300_frame_cache (struct frame_info *this_frame, void **this_cache)
409 struct gdbarch *gdbarch = get_frame_arch (this_frame);
410 struct h8300_frame_cache *cache;
411 int i;
412 CORE_ADDR current_pc;
414 if (*this_cache)
415 return (struct h8300_frame_cache *) *this_cache;
417 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
418 h8300_init_frame_cache (gdbarch, cache);
419 *this_cache = cache;
421 /* In principle, for normal frames, %fp holds the frame pointer,
422 which holds the base address for the current stack frame.
423 However, for functions that don't need it, the frame pointer is
424 optional. For these "frameless" functions the frame pointer is
425 actually the frame pointer of the calling frame. */
427 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
428 if (cache->base == 0)
429 return cache;
431 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
433 cache->pc = get_frame_func (this_frame);
434 current_pc = get_frame_pc (this_frame);
435 if (cache->pc != 0)
436 h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache);
438 if (!cache->uses_fp)
440 /* We didn't find a valid frame, which means that CACHE->base
441 currently holds the frame pointer for our calling frame. If
442 we're at the start of a function, or somewhere half-way its
443 prologue, the function's frame probably hasn't been fully
444 setup yet. Try to reconstruct the base address for the stack
445 frame by looking at the stack pointer. For truly "frameless"
446 functions this might work too. */
448 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
449 + cache->sp_offset;
450 cache->saved_sp = cache->base + BINWORD (gdbarch);
451 cache->saved_regs[E_PC_REGNUM] = 0;
453 else
455 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
456 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
459 /* Adjust all the saved registers such that they contain addresses
460 instead of offsets. */
461 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
462 if (cache->saved_regs[i] != -1)
463 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
465 return cache;
468 static void
469 h8300_frame_this_id (struct frame_info *this_frame, void **this_cache,
470 struct frame_id *this_id)
472 struct h8300_frame_cache *cache =
473 h8300_frame_cache (this_frame, this_cache);
475 /* This marks the outermost frame. */
476 if (cache->base == 0)
477 return;
479 *this_id = frame_id_build (cache->saved_sp, cache->pc);
482 static struct value *
483 h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache,
484 int regnum)
486 struct gdbarch *gdbarch = get_frame_arch (this_frame);
487 struct h8300_frame_cache *cache =
488 h8300_frame_cache (this_frame, this_cache);
490 gdb_assert (regnum >= 0);
492 if (regnum == E_SP_REGNUM && cache->saved_sp)
493 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
495 if (regnum < gdbarch_num_regs (gdbarch)
496 && cache->saved_regs[regnum] != -1)
497 return frame_unwind_got_memory (this_frame, regnum,
498 cache->saved_regs[regnum]);
500 return frame_unwind_got_register (this_frame, regnum, regnum);
503 static const struct frame_unwind h8300_frame_unwind = {
504 "h8300 prologue",
505 NORMAL_FRAME,
506 default_frame_unwind_stop_reason,
507 h8300_frame_this_id,
508 h8300_frame_prev_register,
509 NULL,
510 default_frame_sniffer
513 static CORE_ADDR
514 h8300_frame_base_address (struct frame_info *this_frame, void **this_cache)
516 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
517 return cache->base;
520 static const struct frame_base h8300_frame_base = {
521 &h8300_frame_unwind,
522 h8300_frame_base_address,
523 h8300_frame_base_address,
524 h8300_frame_base_address
527 static CORE_ADDR
528 h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
530 CORE_ADDR func_addr = 0 , func_end = 0;
532 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
534 struct symtab_and_line sal;
535 struct h8300_frame_cache cache;
537 /* Found a function. */
538 sal = find_pc_line (func_addr, 0);
539 if (sal.end && sal.end < func_end)
540 /* Found a line number, use it as end of prologue. */
541 return sal.end;
543 /* No useable line symbol. Use prologue parsing method. */
544 h8300_init_frame_cache (gdbarch, &cache);
545 return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache);
548 /* No function symbol -- just return the PC. */
549 return (CORE_ADDR) pc;
552 /* Function: push_dummy_call
553 Setup the function arguments for calling a function in the inferior.
554 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
555 on the H8/300H.
557 There are actually two ABI's here: -mquickcall (the default) and
558 -mno-quickcall. With -mno-quickcall, all arguments are passed on
559 the stack after the return address, word-aligned. With
560 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
561 GCC doesn't indicate in the object file which ABI was used to
562 compile it, GDB only supports the default --- -mquickcall.
564 Here are the rules for -mquickcall, in detail:
566 Each argument, whether scalar or aggregate, is padded to occupy a
567 whole number of words. Arguments smaller than a word are padded at
568 the most significant end; those larger than a word are padded at
569 the least significant end.
571 The initial arguments are passed in r0 -- r2. Earlier arguments go in
572 lower-numbered registers. Multi-word arguments are passed in
573 consecutive registers, with the most significant end in the
574 lower-numbered register.
576 If an argument doesn't fit entirely in the remaining registers, it
577 is passed entirely on the stack. Stack arguments begin just after
578 the return address. Once an argument has overflowed onto the stack
579 this way, all subsequent arguments are passed on the stack.
581 The above rule has odd consequences. For example, on the h8/300s,
582 if a function takes two longs and an int as arguments:
583 - the first long will be passed in r0/r1,
584 - the second long will be passed entirely on the stack, since it
585 doesn't fit in r2,
586 - and the int will be passed on the stack, even though it could fit
587 in r2.
589 A weird exception: if an argument is larger than a word, but not a
590 whole number of words in length (before padding), it is passed on
591 the stack following the rules for stack arguments above, even if
592 there are sufficient registers available to hold it. Stranger
593 still, the argument registers are still `used up' --- even though
594 there's nothing in them.
596 So, for example, on the h8/300s, if a function expects a three-byte
597 structure and an int, the structure will go on the stack, and the
598 int will go in r2, not r0.
600 If the function returns an aggregate type (struct, union, or class)
601 by value, the caller must allocate space to hold the return value,
602 and pass the callee a pointer to this space as an invisible first
603 argument, in R0.
605 For varargs functions, the last fixed argument and all the variable
606 arguments are always passed on the stack. This means that calls to
607 varargs functions don't work properly unless there is a prototype
608 in scope.
610 Basically, this ABI is not good, for the following reasons:
611 - You can't call vararg functions properly unless a prototype is in scope.
612 - Structure passing is inconsistent, to no purpose I can see.
613 - It often wastes argument registers, of which there are only three
614 to begin with. */
616 static CORE_ADDR
617 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
618 struct regcache *regcache, CORE_ADDR bp_addr,
619 int nargs, struct value **args, CORE_ADDR sp,
620 function_call_return_method return_method,
621 CORE_ADDR struct_addr)
623 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
624 int stack_alloc = 0, stack_offset = 0;
625 int wordsize = BINWORD (gdbarch);
626 int reg = E_ARG0_REGNUM;
627 int argument;
629 /* First, make sure the stack is properly aligned. */
630 sp = align_down (sp, wordsize);
632 /* Now make sure there's space on the stack for the arguments. We
633 may over-allocate a little here, but that won't hurt anything. */
634 for (argument = 0; argument < nargs; argument++)
635 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
636 wordsize);
637 sp -= stack_alloc;
639 /* Now load as many arguments as possible into registers, and push
640 the rest onto the stack.
641 If we're returning a structure by value, then we must pass a
642 pointer to the buffer for the return value as an invisible first
643 argument. */
644 if (return_method == return_method_struct)
645 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
647 for (argument = 0; argument < nargs; argument++)
649 struct type *type = value_type (args[argument]);
650 int len = TYPE_LENGTH (type);
651 char *contents = (char *) value_contents (args[argument]).data ();
653 /* Pad the argument appropriately. */
654 int padded_len = align_up (len, wordsize);
655 /* Use std::vector here to get zero initialization. */
656 std::vector<gdb_byte> padded (padded_len);
658 memcpy ((len < wordsize ? padded.data () + padded_len - len
659 : padded.data ()),
660 contents, len);
662 /* Could the argument fit in the remaining registers? */
663 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
665 /* Are we going to pass it on the stack anyway, for no good
666 reason? */
667 if (len > wordsize && len % wordsize)
669 /* I feel so unclean. */
670 write_memory (sp + stack_offset, padded.data (), padded_len);
671 stack_offset += padded_len;
673 /* That's right --- even though we passed the argument
674 on the stack, we consume the registers anyway! Love
675 me, love my dog. */
676 reg += padded_len / wordsize;
678 else
680 /* Heavens to Betsy --- it's really going in registers!
681 Note that on the h8/300s, there are gaps between the
682 registers in the register file. */
683 int offset;
685 for (offset = 0; offset < padded_len; offset += wordsize)
687 ULONGEST word
688 = extract_unsigned_integer (&padded[offset],
689 wordsize, byte_order);
690 regcache_cooked_write_unsigned (regcache, reg++, word);
694 else
696 /* It doesn't fit in registers! Onto the stack it goes. */
697 write_memory (sp + stack_offset, padded.data (), padded_len);
698 stack_offset += padded_len;
700 /* Once one argument has spilled onto the stack, all
701 subsequent arguments go on the stack. */
702 reg = E_ARGLAST_REGNUM + 1;
706 /* Store return address. */
707 sp -= wordsize;
708 write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr);
710 /* Update stack pointer. */
711 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
713 /* Return the new stack pointer minus the return address slot since
714 that's what DWARF2/GCC uses as the frame's CFA. */
715 return sp + wordsize;
718 /* Function: extract_return_value
719 Figure out where in REGBUF the called function has left its return value.
720 Copy that into VALBUF. Be sure to account for CPU type. */
722 static void
723 h8300_extract_return_value (struct type *type, struct regcache *regcache,
724 gdb_byte *valbuf)
726 struct gdbarch *gdbarch = regcache->arch ();
727 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
728 int len = TYPE_LENGTH (type);
729 ULONGEST c, addr;
731 switch (len)
733 case 1:
734 case 2:
735 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
736 store_unsigned_integer (valbuf, len, byte_order, c);
737 break;
738 case 4: /* Needs two registers on plain H8/300 */
739 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
740 store_unsigned_integer (valbuf, 2, byte_order, c);
741 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
742 store_unsigned_integer (valbuf + 2, 2, byte_order, c);
743 break;
744 case 8: /* long long is now 8 bytes. */
745 if (type->code () == TYPE_CODE_INT)
747 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
748 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order);
749 store_unsigned_integer (valbuf, len, byte_order, c);
751 else
753 error (_("I don't know how this 8 byte value is returned."));
755 break;
759 static void
760 h8300h_extract_return_value (struct type *type, struct regcache *regcache,
761 gdb_byte *valbuf)
763 struct gdbarch *gdbarch = regcache->arch ();
764 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
765 ULONGEST c;
767 switch (TYPE_LENGTH (type))
769 case 1:
770 case 2:
771 case 4:
772 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
773 store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c);
774 break;
775 case 8: /* long long is now 8 bytes. */
776 if (type->code () == TYPE_CODE_INT)
778 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
779 store_unsigned_integer (valbuf, 4, byte_order, c);
780 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
781 store_unsigned_integer (valbuf + 4, 4, byte_order, c);
783 else
785 error (_("I don't know how this 8 byte value is returned."));
787 break;
791 static int
792 h8300_use_struct_convention (struct type *value_type)
794 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
795 stack. */
797 if (value_type->code () == TYPE_CODE_STRUCT
798 || value_type->code () == TYPE_CODE_UNION)
799 return 1;
800 return !(TYPE_LENGTH (value_type) == 1
801 || TYPE_LENGTH (value_type) == 2
802 || TYPE_LENGTH (value_type) == 4);
805 static int
806 h8300h_use_struct_convention (struct type *value_type)
808 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
809 returned in R0/R1, everything else on the stack. */
810 if (value_type->code () == TYPE_CODE_STRUCT
811 || value_type->code () == TYPE_CODE_UNION)
812 return 1;
813 return !(TYPE_LENGTH (value_type) == 1
814 || TYPE_LENGTH (value_type) == 2
815 || TYPE_LENGTH (value_type) == 4
816 || (TYPE_LENGTH (value_type) == 8
817 && value_type->code () == TYPE_CODE_INT));
820 /* Function: store_return_value
821 Place the appropriate value in the appropriate registers.
822 Primarily used by the RETURN command. */
824 static void
825 h8300_store_return_value (struct type *type, struct regcache *regcache,
826 const gdb_byte *valbuf)
828 struct gdbarch *gdbarch = regcache->arch ();
829 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
830 ULONGEST val;
832 switch (TYPE_LENGTH (type))
834 case 1:
835 case 2: /* short... */
836 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
837 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
838 break;
839 case 4: /* long, float */
840 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
841 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
842 (val >> 16) & 0xffff);
843 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
844 break;
845 case 8: /* long long, double and long double
846 are all defined as 4 byte types so
847 far so this shouldn't happen. */
848 error (_("I don't know how to return an 8 byte value."));
849 break;
853 static void
854 h8300h_store_return_value (struct type *type, struct regcache *regcache,
855 const gdb_byte *valbuf)
857 struct gdbarch *gdbarch = regcache->arch ();
858 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
859 ULONGEST val;
861 switch (TYPE_LENGTH (type))
863 case 1:
864 case 2:
865 case 4: /* long, float */
866 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
867 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
868 break;
869 case 8:
870 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
871 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
872 (val >> 32) & 0xffffffff);
873 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
874 val & 0xffffffff);
875 break;
879 static enum return_value_convention
880 h8300_return_value (struct gdbarch *gdbarch, struct value *function,
881 struct type *type, struct regcache *regcache,
882 gdb_byte *readbuf, const gdb_byte *writebuf)
884 if (h8300_use_struct_convention (type))
885 return RETURN_VALUE_STRUCT_CONVENTION;
886 if (writebuf)
887 h8300_store_return_value (type, regcache, writebuf);
888 else if (readbuf)
889 h8300_extract_return_value (type, regcache, readbuf);
890 return RETURN_VALUE_REGISTER_CONVENTION;
893 static enum return_value_convention
894 h8300h_return_value (struct gdbarch *gdbarch, struct value *function,
895 struct type *type, struct regcache *regcache,
896 gdb_byte *readbuf, const gdb_byte *writebuf)
898 if (h8300h_use_struct_convention (type))
900 if (readbuf)
902 ULONGEST addr;
904 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
905 read_memory (addr, readbuf, TYPE_LENGTH (type));
908 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
910 if (writebuf)
911 h8300h_store_return_value (type, regcache, writebuf);
912 else if (readbuf)
913 h8300h_extract_return_value (type, regcache, readbuf);
914 return RETURN_VALUE_REGISTER_CONVENTION;
917 /* Implementation of 'register_sim_regno' gdbarch method. */
919 static int
920 h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum)
922 /* Only makes sense to supply raw registers. */
923 gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
925 /* We hide the raw ccr from the user by making it nameless. Because
926 the default register_sim_regno hook returns
927 LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to
928 override it. The sim register numbering is compatible with
929 gdb's. */
930 return regnum;
933 static const char *
934 h8300_register_name_common (const char *regnames[], int numregs,
935 struct gdbarch *gdbarch, int regno)
937 if (regno < 0
938 || regno >= numregs)
939 internal_error (__FILE__, __LINE__,
940 _("h8300_register_name_common: illegal register number %d"),
941 regno);
942 else
943 return regnames[regno];
946 static const char *
947 h8300_register_name (struct gdbarch *gdbarch, int regno)
949 /* The register names change depending on which h8300 processor
950 type is selected. */
951 static const char *register_names[] = {
952 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
953 "sp", "", "pc", "cycles", "tick", "inst",
954 "ccr", /* pseudo register */
956 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
957 gdbarch, regno);
960 static const char *
961 h8300h_register_name (struct gdbarch *gdbarch, int regno)
963 static const char *register_names[] = {
964 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
965 "sp", "", "pc", "cycles", "tick", "inst",
966 "ccr", /* pseudo register */
968 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
969 gdbarch, regno);
972 static const char *
973 h8300s_register_name (struct gdbarch *gdbarch, int regno)
975 static const char *register_names[] = {
976 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
977 "sp", "", "pc", "cycles", "", "tick", "inst",
978 "mach", "macl",
979 "ccr", "exr" /* pseudo registers */
981 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
982 gdbarch, regno);
985 static const char *
986 h8300sx_register_name (struct gdbarch *gdbarch, int regno)
988 static const char *register_names[] = {
989 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
990 "sp", "", "pc", "cycles", "", "tick", "inst",
991 "mach", "macl", "sbr", "vbr",
992 "ccr", "exr" /* pseudo registers */
994 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
995 gdbarch, regno);
998 static void
999 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1000 struct frame_info *frame, int regno)
1002 LONGEST rval;
1003 const char *name = gdbarch_register_name (gdbarch, regno);
1005 if (!name || !*name)
1006 return;
1008 rval = get_frame_register_signed (frame, regno);
1010 gdb_printf (file, "%-14s ", name);
1011 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
1012 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
1014 gdb_printf (file, "0x%02x ", (unsigned char) rval);
1015 print_longest (file, 'u', 1, rval);
1017 else
1019 gdb_printf (file, "0x%s ", phex ((ULONGEST) rval,
1020 BINWORD (gdbarch)));
1021 print_longest (file, 'd', 1, rval);
1023 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1025 /* CCR register */
1026 int C, Z, N, V;
1027 unsigned char l = rval & 0xff;
1028 gdb_printf (file, "\t");
1029 gdb_printf (file, "I-%d ", (l & 0x80) != 0);
1030 gdb_printf (file, "UI-%d ", (l & 0x40) != 0);
1031 gdb_printf (file, "H-%d ", (l & 0x20) != 0);
1032 gdb_printf (file, "U-%d ", (l & 0x10) != 0);
1033 N = (l & 0x8) != 0;
1034 Z = (l & 0x4) != 0;
1035 V = (l & 0x2) != 0;
1036 C = (l & 0x1) != 0;
1037 gdb_printf (file, "N-%d ", N);
1038 gdb_printf (file, "Z-%d ", Z);
1039 gdb_printf (file, "V-%d ", V);
1040 gdb_printf (file, "C-%d ", C);
1041 if ((C | Z) == 0)
1042 gdb_printf (file, "u> ");
1043 if ((C | Z) == 1)
1044 gdb_printf (file, "u<= ");
1045 if (C == 0)
1046 gdb_printf (file, "u>= ");
1047 if (C == 1)
1048 gdb_printf (file, "u< ");
1049 if (Z == 0)
1050 gdb_printf (file, "!= ");
1051 if (Z == 1)
1052 gdb_printf (file, "== ");
1053 if ((N ^ V) == 0)
1054 gdb_printf (file, ">= ");
1055 if ((N ^ V) == 1)
1056 gdb_printf (file, "< ");
1057 if ((Z | (N ^ V)) == 0)
1058 gdb_printf (file, "> ");
1059 if ((Z | (N ^ V)) == 1)
1060 gdb_printf (file, "<= ");
1062 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
1064 /* EXR register */
1065 unsigned char l = rval & 0xff;
1066 gdb_printf (file, "\t");
1067 gdb_printf (file, "T-%d - - - ", (l & 0x80) != 0);
1068 gdb_printf (file, "I2-%d ", (l & 4) != 0);
1069 gdb_printf (file, "I1-%d ", (l & 2) != 0);
1070 gdb_printf (file, "I0-%d", (l & 1) != 0);
1072 gdb_printf (file, "\n");
1075 static void
1076 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1077 struct frame_info *frame, int regno, int cpregs)
1079 if (regno < 0)
1081 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1082 h8300_print_register (gdbarch, file, frame, regno);
1083 h8300_print_register (gdbarch, file, frame,
1084 E_PSEUDO_CCR_REGNUM (gdbarch));
1085 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1086 if (is_h8300smode (gdbarch))
1088 h8300_print_register (gdbarch, file, frame,
1089 E_PSEUDO_EXR_REGNUM (gdbarch));
1090 if (is_h8300sxmode (gdbarch))
1092 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1093 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1095 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1096 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1097 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1098 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1099 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1101 else
1103 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1104 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1105 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1108 else
1110 if (regno == E_CCR_REGNUM)
1111 h8300_print_register (gdbarch, file, frame,
1112 E_PSEUDO_CCR_REGNUM (gdbarch));
1113 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
1114 && is_h8300smode (gdbarch))
1115 h8300_print_register (gdbarch, file, frame,
1116 E_PSEUDO_EXR_REGNUM (gdbarch));
1117 else
1118 h8300_print_register (gdbarch, file, frame, regno);
1122 static struct type *
1123 h8300_register_type (struct gdbarch *gdbarch, int regno)
1125 if (regno < 0 || regno >= gdbarch_num_cooked_regs (gdbarch))
1126 internal_error (__FILE__, __LINE__,
1127 _("h8300_register_type: illegal register number %d"),
1128 regno);
1129 else
1131 switch (regno)
1133 case E_PC_REGNUM:
1134 return builtin_type (gdbarch)->builtin_func_ptr;
1135 case E_SP_REGNUM:
1136 case E_FP_REGNUM:
1137 return builtin_type (gdbarch)->builtin_data_ptr;
1138 default:
1139 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1140 return builtin_type (gdbarch)->builtin_uint8;
1141 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1142 return builtin_type (gdbarch)->builtin_uint8;
1143 else if (is_h8300hmode (gdbarch))
1144 return builtin_type (gdbarch)->builtin_int32;
1145 else
1146 return builtin_type (gdbarch)->builtin_int16;
1151 /* Helpers for h8300_pseudo_register_read. We expose ccr/exr as
1152 pseudo-registers to users with smaller sizes than the corresponding
1153 raw registers. These helpers extend/narrow the values. */
1155 static enum register_status
1156 pseudo_from_raw_register (struct gdbarch *gdbarch, readable_regcache *regcache,
1157 gdb_byte *buf, int pseudo_regno, int raw_regno)
1159 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1160 enum register_status status;
1161 ULONGEST val;
1163 status = regcache->raw_read (raw_regno, &val);
1164 if (status == REG_VALID)
1165 store_unsigned_integer (buf,
1166 register_size (gdbarch, pseudo_regno),
1167 byte_order, val);
1168 return status;
1171 /* See pseudo_from_raw_register. */
1173 static void
1174 raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache,
1175 const gdb_byte *buf, int raw_regno, int pseudo_regno)
1177 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1178 ULONGEST val;
1180 val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno),
1181 byte_order);
1182 regcache_raw_write_unsigned (regcache, raw_regno, val);
1185 static enum register_status
1186 h8300_pseudo_register_read (struct gdbarch *gdbarch,
1187 readable_regcache *regcache, int regno,
1188 gdb_byte *buf)
1190 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1192 return pseudo_from_raw_register (gdbarch, regcache, buf,
1193 regno, E_CCR_REGNUM);
1195 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1197 return pseudo_from_raw_register (gdbarch, regcache, buf,
1198 regno, E_EXR_REGNUM);
1200 else
1201 return regcache->raw_read (regno, buf);
1204 static void
1205 h8300_pseudo_register_write (struct gdbarch *gdbarch,
1206 struct regcache *regcache, int regno,
1207 const gdb_byte *buf)
1209 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1210 raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno);
1211 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1212 raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno);
1213 else
1214 regcache->raw_write (regno, buf);
1217 static int
1218 h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1220 if (regno == E_CCR_REGNUM)
1221 return E_PSEUDO_CCR_REGNUM (gdbarch);
1222 return regno;
1225 static int
1226 h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1228 if (regno == E_CCR_REGNUM)
1229 return E_PSEUDO_CCR_REGNUM (gdbarch);
1230 if (regno == E_EXR_REGNUM)
1231 return E_PSEUDO_EXR_REGNUM (gdbarch);
1232 return regno;
1235 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1236 constexpr gdb_byte h8300_break_insn[] = { 0x01, 0x80 }; /* Sleep */
1238 typedef BP_MANIPULATION (h8300_break_insn) h8300_breakpoint;
1240 static struct gdbarch *
1241 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1243 struct gdbarch *gdbarch;
1245 arches = gdbarch_list_lookup_by_info (arches, &info);
1246 if (arches != NULL)
1247 return arches->gdbarch;
1249 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1250 return NULL;
1252 gdbarch = gdbarch_alloc (&info, 0);
1254 set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno);
1256 switch (info.bfd_arch_info->mach)
1258 case bfd_mach_h8300:
1259 set_gdbarch_num_regs (gdbarch, 13);
1260 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1261 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1262 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1263 set_gdbarch_register_name (gdbarch, h8300_register_name);
1264 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1265 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1266 set_gdbarch_return_value (gdbarch, h8300_return_value);
1267 break;
1268 case bfd_mach_h8300h:
1269 case bfd_mach_h8300hn:
1270 set_gdbarch_num_regs (gdbarch, 13);
1271 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1272 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1273 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1274 set_gdbarch_register_name (gdbarch, h8300h_register_name);
1275 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1277 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1278 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1280 else
1282 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1283 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1285 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1286 break;
1287 case bfd_mach_h8300s:
1288 case bfd_mach_h8300sn:
1289 set_gdbarch_num_regs (gdbarch, 16);
1290 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1291 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1292 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1293 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1294 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1296 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1297 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1299 else
1301 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1302 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1304 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1305 break;
1306 case bfd_mach_h8300sx:
1307 case bfd_mach_h8300sxn:
1308 set_gdbarch_num_regs (gdbarch, 18);
1309 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1310 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1311 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1312 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1313 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1315 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1316 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1318 else
1320 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1321 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1323 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1324 break;
1327 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1328 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1331 * Basic register fields and methods.
1334 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1335 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1336 set_gdbarch_register_type (gdbarch, h8300_register_type);
1337 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1340 * Frame Info
1342 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1344 /* Frame unwinder. */
1345 frame_base_set_default (gdbarch, &h8300_frame_base);
1348 * Miscellany
1350 /* Stack grows up. */
1351 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1353 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
1354 h8300_breakpoint::kind_from_pc);
1355 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
1356 h8300_breakpoint::bp_from_kind);
1357 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1359 set_gdbarch_char_signed (gdbarch, 0);
1360 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1361 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1362 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1364 set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1365 set_gdbarch_wchar_signed (gdbarch, 0);
1367 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1368 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1369 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1370 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1372 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1374 /* Hook in the DWARF CFI frame unwinder. */
1375 dwarf2_append_unwinders (gdbarch);
1376 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
1378 return gdbarch;
1382 void _initialize_h8300_tdep ();
1383 void
1384 _initialize_h8300_tdep ()
1386 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1389 static int
1390 is_h8300hmode (struct gdbarch *gdbarch)
1392 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1393 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1394 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1395 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1396 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1397 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1400 static int
1401 is_h8300smode (struct gdbarch *gdbarch)
1403 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1404 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1405 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1406 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1409 static int
1410 is_h8300sxmode (struct gdbarch *gdbarch)
1412 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1413 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1416 static int
1417 is_h8300_normal_mode (struct gdbarch *gdbarch)
1419 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1420 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1421 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;