opcodes/mt-desc.h

   1 /* CPU data header for mt.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996-2010 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, write to the Free Software Foundation, Inc.,
  21    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  22
  23 */
  24
  25 #ifndef MT_CPU_H
  26 #define MT_CPU_H
  27
  28 #define CGEN_ARCH mt
  29
  30 /* Given symbol S, return mt_cgen_<S>.  */
  31 #define CGEN_SYM(s) mt##_cgen_##s
  32
  33
  34 /* Selected cpu families.  */
  35 #define HAVE_CPU_MS1BF
  36 #define HAVE_CPU_MS1_003BF
  37 #define HAVE_CPU_MS2BF
  38
  39 #define CGEN_INSN_LSB0_P 1
  40
  41 /* Minimum size of any insn (in bytes).  */
  42 #define CGEN_MIN_INSN_SIZE 4
  43
  44 /* Maximum size of any insn (in bytes).  */
  45 #define CGEN_MAX_INSN_SIZE 4
  46
  47 #define CGEN_INT_INSN_P 1
  48
  49 /* Maximum number of syntax elements in an instruction.  */
  50 #define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 40
  51
  52 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
  53    e.g. In "b,a foo" the ",a" is an operand.  If mnemonics have operands
  54    we can't hash on everything up to the space.  */
  55 #define CGEN_MNEMONIC_OPERANDS
  56
  57 /* Maximum number of fields in an instruction.  */
  58 #define CGEN_ACTUAL_MAX_IFMT_OPERANDS 14
  59
  60 /* Enums.  */
  61
  62 /* Enum declaration for msys enums.  */
  63 typedef enum insn_msys {
  64   MSYS_NO, MSYS_YES
  65 } INSN_MSYS;
  66
  67 /* Enum declaration for opc enums.  */
  68 typedef enum insn_opc {
  69   OPC_ADD = 0, OPC_ADDU = 1, OPC_SUB = 2, OPC_SUBU = 3
  70  , OPC_MUL = 4, OPC_AND = 8, OPC_OR = 9, OPC_XOR = 10
  71  , OPC_NAND = 11, OPC_NOR = 12, OPC_XNOR = 13, OPC_LDUI = 14
  72  , OPC_LSL = 16, OPC_LSR = 17, OPC_ASR = 18, OPC_BRLT = 24
  73  , OPC_BRLE = 25, OPC_BREQ = 26, OPC_JMP = 27, OPC_JAL = 28
  74  , OPC_BRNEQ = 29, OPC_DBNZ = 30, OPC_LOOP = 31, OPC_LDW = 32
  75  , OPC_STW = 33, OPC_EI = 48, OPC_DI = 49, OPC_SI = 50
  76  , OPC_RETI = 51, OPC_BREAK = 52, OPC_IFLUSH = 53
  77 } INSN_OPC;
  78
  79 /* Enum declaration for msopc enums.  */
  80 typedef enum insn_msopc {
  81   MSOPC_LDCTXT, MSOPC_LDFB, MSOPC_STFB, MSOPC_FBCB
  82  , MSOPC_MFBCB, MSOPC_FBCCI, MSOPC_FBRCI, MSOPC_FBCRI
  83  , MSOPC_FBRRI, MSOPC_MFBCCI, MSOPC_MFBRCI, MSOPC_MFBCRI
  84  , MSOPC_MFBRRI, MSOPC_FBCBDR, MSOPC_RCFBCB, MSOPC_MRCFBCB
  85  , MSOPC_CBCAST, MSOPC_DUPCBCAST, MSOPC_WFBI, MSOPC_WFB
  86  , MSOPC_RCRISC, MSOPC_FBCBINC, MSOPC_RCXMODE, MSOPC_INTLVR
  87  , MSOPC_WFBINC, MSOPC_MWFBINC, MSOPC_WFBINCR, MSOPC_MWFBINCR
  88  , MSOPC_FBCBINCS, MSOPC_MFBCBINCS, MSOPC_FBCBINCRS, MSOPC_MFBCBINCRS
  89 } INSN_MSOPC;
  90
  91 /* Enum declaration for imm enums.  */
  92 typedef enum insn_imm {
  93   IMM_NO, IMM_YES
  94 } INSN_IMM;
  95
  96 /* Enum declaration for .  */
  97 typedef enum msys_syms {
  98   H_NIL_DUP = 1, H_NIL_XX = 0
  99 } MSYS_SYMS;
 100
 101 /* Attributes.  */
 102
 103 /* Enum declaration for machine type selection.  */
 104 typedef enum mach_attr {
 105   MACH_BASE, MACH_MS1, MACH_MS1_003, MACH_MS2
 106  , MACH_MAX
 107 } MACH_ATTR;
 108
 109 /* Enum declaration for instruction set selection.  */
 110 typedef enum isa_attr {
 111   ISA_MT, ISA_MAX
 112 } ISA_ATTR;
 113
 114 /* Number of architecture variants.  */
 115 #define MAX_ISAS  1
 116 #define MAX_MACHS ((int) MACH_MAX)
 117
 118 /* Ifield support.  */
 119
 120 /* Ifield attribute indices.  */
 121
 122 /* Enum declaration for cgen_ifld attrs.  */
 123 typedef enum cgen_ifld_attr {
 124   CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
 125  , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
 126  , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS
 127 } CGEN_IFLD_ATTR;
 128
 129 /* Number of non-boolean elements in cgen_ifld_attr.  */
 130 #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
 131
 132 /* cgen_ifld attribute accessor macros.  */
 133 #define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
 134 #define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_VIRTUAL)) != 0)
 135 #define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
 136 #define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
 137 #define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_RESERVED)) != 0)
 138 #define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
 139 #define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGNED)) != 0)
 140
 141 /* Enum declaration for mt ifield types.  */
 142 typedef enum ifield_type {
 143   MT_F_NIL, MT_F_ANYOF, MT_F_MSYS, MT_F_OPC
 144  , MT_F_IMM, MT_F_UU24, MT_F_SR1, MT_F_SR2
 145  , MT_F_DR, MT_F_DRRR, MT_F_IMM16U, MT_F_IMM16S
 146  , MT_F_IMM16A, MT_F_UU4A, MT_F_UU4B, MT_F_UU12
 147  , MT_F_UU8, MT_F_UU16, MT_F_UU1, MT_F_MSOPC
 148  , MT_F_UU_26_25, MT_F_MASK, MT_F_BANKADDR, MT_F_RDA
 149  , MT_F_UU_2_25, MT_F_RBBC, MT_F_PERM, MT_F_MODE
 150  , MT_F_UU_1_24, MT_F_WR, MT_F_FBINCR, MT_F_UU_2_23
 151  , MT_F_XMODE, MT_F_A23, MT_F_MASK1, MT_F_CR
 152  , MT_F_TYPE, MT_F_INCAMT, MT_F_CBS, MT_F_UU_1_19
 153  , MT_F_BALL, MT_F_COLNUM, MT_F_BRC, MT_F_INCR
 154  , MT_F_FBDISP, MT_F_UU_4_15, MT_F_LENGTH, MT_F_UU_1_15
 155  , MT_F_RC, MT_F_RCNUM, MT_F_ROWNUM, MT_F_CBX
 156  , MT_F_ID, MT_F_SIZE, MT_F_ROWNUM1, MT_F_UU_3_11
 157  , MT_F_RC1, MT_F_CCB, MT_F_CBRB, MT_F_CDB
 158  , MT_F_ROWNUM2, MT_F_CELL, MT_F_UU_3_9, MT_F_CONTNUM
 159  , MT_F_UU_1_6, MT_F_DUP, MT_F_RC2, MT_F_CTXDISP
 160  , MT_F_IMM16L, MT_F_LOOPO, MT_F_CB1SEL, MT_F_CB2SEL
 161  , MT_F_CB1INCR, MT_F_CB2INCR, MT_F_RC3, MT_F_MSYSFRSR2
 162  , MT_F_BRC2, MT_F_BALL2, MT_F_MAX
 163 } IFIELD_TYPE;
 164
 165 #define MAX_IFLD ((int) MT_F_MAX)
 166
 167 /* Hardware attribute indices.  */
 168
 169 /* Enum declaration for cgen_hw attrs.  */
 170 typedef enum cgen_hw_attr {
 171   CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
 172  , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS
 173 } CGEN_HW_ATTR;
 174
 175 /* Number of non-boolean elements in cgen_hw_attr.  */
 176 #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
 177
 178 /* cgen_hw attribute accessor macros.  */
 179 #define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
 180 #define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_VIRTUAL)) != 0)
 181 #define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_CACHE_ADDR)) != 0)
 182 #define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PC)) != 0)
 183 #define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PROFILE)) != 0)
 184
 185 /* Enum declaration for mt hardware types.  */
 186 typedef enum cgen_hw_type {
 187   HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
 188  , HW_H_IADDR, HW_H_SPR, HW_H_PC, HW_MAX
 189 } CGEN_HW_TYPE;
 190
 191 #define MAX_HW ((int) HW_MAX)
 192
 193 /* Operand attribute indices.  */
 194
 195 /* Enum declaration for cgen_operand attrs.  */
 196 typedef enum cgen_operand_attr {
 197   CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
 198  , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
 199  , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS
 200 } CGEN_OPERAND_ATTR;
 201
 202 /* Number of non-boolean elements in cgen_operand_attr.  */
 203 #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
 204
 205 /* cgen_operand attribute accessor macros.  */
 206 #define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
 207 #define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
 208 #define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
 209 #define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
 210 #define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
 211 #define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGNED)) != 0)
 212 #define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
 213 #define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_RELAX)) != 0)
 214 #define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
 215
 216 /* Enum declaration for mt operand types.  */
 217 typedef enum cgen_operand_type {
 218   MT_OPERAND_PC, MT_OPERAND_FRSR1, MT_OPERAND_FRSR2, MT_OPERAND_FRDR
 219  , MT_OPERAND_FRDRRR, MT_OPERAND_IMM16, MT_OPERAND_IMM16Z, MT_OPERAND_IMM16O
 220  , MT_OPERAND_RC, MT_OPERAND_RCNUM, MT_OPERAND_CONTNUM, MT_OPERAND_RBBC
 221  , MT_OPERAND_COLNUM, MT_OPERAND_ROWNUM, MT_OPERAND_ROWNUM1, MT_OPERAND_ROWNUM2
 222  , MT_OPERAND_RC1, MT_OPERAND_RC2, MT_OPERAND_CBRB, MT_OPERAND_CELL
 223  , MT_OPERAND_DUP, MT_OPERAND_CTXDISP, MT_OPERAND_FBDISP, MT_OPERAND_TYPE
 224  , MT_OPERAND_MASK, MT_OPERAND_BANKADDR, MT_OPERAND_INCAMT, MT_OPERAND_XMODE
 225  , MT_OPERAND_MASK1, MT_OPERAND_BALL, MT_OPERAND_BRC, MT_OPERAND_RDA
 226  , MT_OPERAND_WR, MT_OPERAND_BALL2, MT_OPERAND_BRC2, MT_OPERAND_PERM
 227  , MT_OPERAND_A23, MT_OPERAND_CR, MT_OPERAND_CBS, MT_OPERAND_INCR
 228  , MT_OPERAND_LENGTH, MT_OPERAND_CBX, MT_OPERAND_CCB, MT_OPERAND_CDB
 229  , MT_OPERAND_MODE, MT_OPERAND_ID, MT_OPERAND_SIZE, MT_OPERAND_FBINCR
 230  , MT_OPERAND_LOOPSIZE, MT_OPERAND_IMM16L, MT_OPERAND_RC3, MT_OPERAND_CB1SEL
 231  , MT_OPERAND_CB2SEL, MT_OPERAND_CB1INCR, MT_OPERAND_CB2INCR, MT_OPERAND_MAX
 232 } CGEN_OPERAND_TYPE;
 233
 234 /* Number of operands types.  */
 235 #define MAX_OPERANDS 55
 236
 237 /* Maximum number of operands referenced by any insn.  */
 238 #define MAX_OPERAND_INSTANCES 8
 239
 240 /* Insn attribute indices.  */
 241
 242 /* Enum declaration for cgen_insn attrs.  */
 243 typedef enum cgen_insn_attr {
 244   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
 245  , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
 246  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_LOAD_DELAY, CGEN_INSN_MEMORY_ACCESS
 247  , CGEN_INSN_AL_INSN, CGEN_INSN_IO_INSN, CGEN_INSN_BR_INSN, CGEN_INSN_JAL_HAZARD
 248  , CGEN_INSN_USES_FRDR, CGEN_INSN_USES_FRDRRR, CGEN_INSN_USES_FRSR1, CGEN_INSN_USES_FRSR2
 249  , CGEN_INSN_SKIPA, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH
 250  , CGEN_INSN_END_NBOOLS
 251 } CGEN_INSN_ATTR;
 252
 253 /* Number of non-boolean elements in cgen_insn_attr.  */
 254 #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
 255
 256 /* cgen_insn attribute accessor macros.  */
 257 #define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
 258 #define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_ALIAS)) != 0)
 259 #define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_VIRTUAL)) != 0)
 260 #define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
 261 #define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_COND_CTI)) != 0)
 262 #define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_SKIP_CTI)) != 0)
 263 #define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
 264 #define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXABLE)) != 0)
 265 #define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXED)) != 0)
 266 #define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_NO_DIS)) != 0)
 267 #define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_PBB)) != 0)
 268 #define CGEN_ATTR_CGEN_INSN_LOAD_DELAY_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_LOAD_DELAY)) != 0)
 269 #define CGEN_ATTR_CGEN_INSN_MEMORY_ACCESS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_MEMORY_ACCESS)) != 0)
 270 #define CGEN_ATTR_CGEN_INSN_AL_INSN_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_AL_INSN)) != 0)
 271 #define CGEN_ATTR_CGEN_INSN_IO_INSN_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_IO_INSN)) != 0)
 272 #define CGEN_ATTR_CGEN_INSN_BR_INSN_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_BR_INSN)) != 0)
 273 #define CGEN_ATTR_CGEN_INSN_JAL_HAZARD_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_JAL_HAZARD)) != 0)
 274 #define CGEN_ATTR_CGEN_INSN_USES_FRDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_USES_FRDR)) != 0)
 275 #define CGEN_ATTR_CGEN_INSN_USES_FRDRRR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_USES_FRDRRR)) != 0)
 276 #define CGEN_ATTR_CGEN_INSN_USES_FRSR1_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_USES_FRSR1)) != 0)
 277 #define CGEN_ATTR_CGEN_INSN_USES_FRSR2_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_USES_FRSR2)) != 0)
 278 #define CGEN_ATTR_CGEN_INSN_SKIPA_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_SKIPA)) != 0)
 279
 280 /* cgen.h uses things we just defined.  */
 281 #include "opcode/cgen.h"
 282
 283 extern const struct cgen_ifld mt_cgen_ifld_table[];
 284
 285 /* Attributes.  */
 286 extern const CGEN_ATTR_TABLE mt_cgen_hardware_attr_table[];
 287 extern const CGEN_ATTR_TABLE mt_cgen_ifield_attr_table[];
 288 extern const CGEN_ATTR_TABLE mt_cgen_operand_attr_table[];
 289 extern const CGEN_ATTR_TABLE mt_cgen_insn_attr_table[];
 290
 291 /* Hardware decls.  */
 292
 293 extern CGEN_KEYWORD mt_cgen_opval_h_spr;
 294
 295 extern const CGEN_HW_ENTRY mt_cgen_hw_table[];
 296
 297
 298
 299 #endif /* MT_CPU_H */