arch/Config.in.arm

   1 # arm cpu features
   2 config BR2_ARM_CPU_HAS_NEON
   3         bool
   4
   5 # for some cores, NEON support is optional
   6 config BR2_ARM_CPU_MAYBE_HAS_NEON
   7         bool
   8
   9 # for some cores, VFPv2 is optional
  10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  11         bool
  12
  13 config BR2_ARM_CPU_HAS_VFPV2
  14         bool
  15
  16 # for some cores, VFPv3 is optional
  17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  18         bool
  19         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  20
  21 config BR2_ARM_CPU_HAS_VFPV3
  22         bool
  23         select BR2_ARM_CPU_HAS_VFPV2
  24
  25 # for some cores, VFPv4 is optional
  26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  27         bool
  28         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  29
  30 config BR2_ARM_CPU_HAS_VFPV4
  31         bool
  32         select BR2_ARM_CPU_HAS_VFPV3
  33
  34 config BR2_ARM_CPU_HAS_ARM
  35         bool
  36
  37 config BR2_ARM_CPU_HAS_THUMB
  38         bool
  39
  40 config BR2_ARM_CPU_HAS_THUMB2
  41         bool
  42
  43 config BR2_ARM_CPU_ARMV4
  44         bool
  45
  46 config BR2_ARM_CPU_ARMV5
  47         bool
  48
  49 config BR2_ARM_CPU_ARMV6
  50         bool
  51
  52 config BR2_ARM_CPU_ARMV7A
  53         bool
  54
  55 config BR2_ARM_CPU_ARMV7M
  56         bool
  57
  58 choice
  59         prompt "Target Architecture Variant"
  60         depends on BR2_arm || BR2_armeb
  61         default BR2_arm926t
  62         help
  63           Specific CPU variant to use
  64
  65 config BR2_arm920t
  66         bool "arm920t"
  67         select BR2_ARM_CPU_HAS_ARM
  68         select BR2_ARM_CPU_HAS_THUMB
  69         select BR2_ARM_CPU_ARMV4
  70         select BR2_ARCH_HAS_MMU_OPTIONAL
  71 config BR2_arm922t
  72         bool "arm922t"
  73         select BR2_ARM_CPU_HAS_ARM
  74         select BR2_ARM_CPU_HAS_THUMB
  75         select BR2_ARM_CPU_ARMV4
  76         select BR2_ARCH_HAS_MMU_OPTIONAL
  77 config BR2_arm926t
  78         bool "arm926t"
  79         select BR2_ARM_CPU_HAS_ARM
  80         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  81         select BR2_ARM_CPU_HAS_THUMB
  82         select BR2_ARM_CPU_ARMV5
  83         select BR2_ARCH_HAS_MMU_OPTIONAL
  84 config BR2_arm1136j_s
  85         bool "arm1136j-s"
  86         select BR2_ARM_CPU_HAS_ARM
  87         select BR2_ARM_CPU_HAS_THUMB
  88         select BR2_ARM_CPU_ARMV6
  89         select BR2_ARCH_HAS_MMU_OPTIONAL
  90 config BR2_arm1136jf_s
  91         bool "arm1136jf-s"
  92         select BR2_ARM_CPU_HAS_ARM
  93         select BR2_ARM_CPU_HAS_VFPV2
  94         select BR2_ARM_CPU_HAS_THUMB
  95         select BR2_ARM_CPU_ARMV6
  96         select BR2_ARCH_HAS_MMU_OPTIONAL
  97 config BR2_arm1176jz_s
  98         bool "arm1176jz-s"
  99         select BR2_ARM_CPU_HAS_ARM
 100         select BR2_ARM_CPU_HAS_THUMB
 101         select BR2_ARM_CPU_ARMV6
 102         select BR2_ARCH_HAS_MMU_OPTIONAL
 103 config BR2_arm1176jzf_s
 104         bool "arm1176jzf-s"
 105         select BR2_ARM_CPU_HAS_ARM
 106         select BR2_ARM_CPU_HAS_VFPV2
 107         select BR2_ARM_CPU_HAS_THUMB
 108         select BR2_ARM_CPU_ARMV6
 109         select BR2_ARCH_HAS_MMU_OPTIONAL
 110 config BR2_arm11mpcore
 111         bool "mpcore"
 112         select BR2_ARM_CPU_HAS_ARM
 113         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 114         select BR2_ARM_CPU_HAS_THUMB
 115         select BR2_ARM_CPU_ARMV6
 116         select BR2_ARCH_HAS_MMU_OPTIONAL
 117 config BR2_cortex_a5
 118         bool "cortex-A5"
 119         select BR2_ARM_CPU_HAS_ARM
 120         select BR2_ARM_CPU_MAYBE_HAS_NEON
 121         select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 122         select BR2_ARM_CPU_HAS_THUMB2
 123         select BR2_ARM_CPU_ARMV7A
 124         select BR2_ARCH_HAS_MMU_OPTIONAL
 125 config BR2_cortex_a7
 126         bool "cortex-A7"
 127         select BR2_ARM_CPU_HAS_ARM
 128         select BR2_ARM_CPU_HAS_NEON
 129         select BR2_ARM_CPU_HAS_VFPV4
 130         select BR2_ARM_CPU_HAS_THUMB2
 131         select BR2_ARM_CPU_ARMV7A
 132         select BR2_ARCH_HAS_MMU_OPTIONAL
 133 config BR2_cortex_a8
 134         bool "cortex-A8"
 135         select BR2_ARM_CPU_HAS_ARM
 136         select BR2_ARM_CPU_HAS_NEON
 137         select BR2_ARM_CPU_HAS_VFPV3
 138         select BR2_ARM_CPU_HAS_THUMB2
 139         select BR2_ARM_CPU_ARMV7A
 140         select BR2_ARCH_HAS_MMU_OPTIONAL
 141 config BR2_cortex_a9
 142         bool "cortex-A9"
 143         select BR2_ARM_CPU_HAS_ARM
 144         select BR2_ARM_CPU_MAYBE_HAS_NEON
 145         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 146         select BR2_ARM_CPU_HAS_THUMB2
 147         select BR2_ARM_CPU_ARMV7A
 148         select BR2_ARCH_HAS_MMU_OPTIONAL
 149 config BR2_cortex_a12
 150         bool "cortex-A12"
 151         select BR2_ARM_CPU_HAS_ARM
 152         select BR2_ARM_CPU_HAS_NEON
 153         select BR2_ARM_CPU_HAS_VFPV4
 154         select BR2_ARM_CPU_HAS_THUMB2
 155         select BR2_ARM_CPU_ARMV7A
 156         select BR2_ARCH_HAS_MMU_OPTIONAL
 157 config BR2_cortex_a15
 158         bool "cortex-A15"
 159         select BR2_ARM_CPU_HAS_ARM
 160         select BR2_ARM_CPU_HAS_NEON
 161         select BR2_ARM_CPU_HAS_VFPV4
 162         select BR2_ARM_CPU_HAS_THUMB2
 163         select BR2_ARM_CPU_ARMV7A
 164         select BR2_ARCH_HAS_MMU_OPTIONAL
 165 config BR2_cortex_a17
 166         bool "cortex-A17"
 167         select BR2_ARM_CPU_HAS_ARM
 168         select BR2_ARM_CPU_HAS_NEON
 169         select BR2_ARM_CPU_HAS_VFPV4
 170         select BR2_ARM_CPU_HAS_THUMB2
 171         select BR2_ARM_CPU_ARMV7A
 172         select BR2_ARCH_HAS_MMU_OPTIONAL
 173 config BR2_cortex_m3
 174         bool "cortex-M3"
 175         select BR2_ARM_CPU_HAS_THUMB2
 176         select BR2_ARM_CPU_ARMV7M
 177 config BR2_cortex_m4
 178         bool "cortex-M4"
 179         select BR2_ARM_CPU_HAS_THUMB2
 180         select BR2_ARM_CPU_ARMV7M
 181 config BR2_fa526
 182         bool "fa526/626"
 183         select BR2_ARM_CPU_HAS_ARM
 184         select BR2_ARM_CPU_ARMV4
 185         select BR2_ARCH_HAS_MMU_OPTIONAL
 186 config BR2_pj4
 187         bool "pj4"
 188         select BR2_ARM_CPU_HAS_ARM
 189         select BR2_ARM_CPU_HAS_VFPV3
 190         select BR2_ARM_CPU_ARMV7A
 191         select BR2_ARCH_HAS_MMU_OPTIONAL
 192 config BR2_strongarm
 193         bool "strongarm sa110/sa1100"
 194         select BR2_ARM_CPU_HAS_ARM
 195         select BR2_ARM_CPU_ARMV4
 196         select BR2_ARCH_HAS_MMU_OPTIONAL
 197 config BR2_xscale
 198         bool "xscale"
 199         select BR2_ARM_CPU_HAS_ARM
 200         select BR2_ARM_CPU_HAS_THUMB
 201         select BR2_ARM_CPU_ARMV5
 202         select BR2_ARCH_HAS_MMU_OPTIONAL
 203 config BR2_iwmmxt
 204         bool "iwmmxt"
 205         select BR2_ARM_CPU_HAS_ARM
 206         select BR2_ARM_CPU_ARMV5
 207         select BR2_ARCH_HAS_MMU_OPTIONAL
 208 endchoice
 209
 210 config BR2_ARM_ENABLE_NEON
 211         bool "Enable NEON SIMD extension support"
 212         depends on BR2_ARM_CPU_MAYBE_HAS_NEON
 213         select BR2_ARM_CPU_HAS_NEON
 214         help
 215           For some CPU cores, the NEON SIMD extension is optional.
 216           Select this option if you are certain your particular
 217           implementation has NEON support and you want to use it.
 218
 219 config BR2_ARM_ENABLE_VFP
 220         bool "Enable VFP extension support"
 221         depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
 222         select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
 223         select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
 224         select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
 225         help
 226           For some CPU cores, the VFP extension is optional. Select
 227           this option if you are certain your particular
 228           implementation has VFP support and you want to use it.
 229
 230 choice
 231         prompt "Target ABI"
 232         depends on BR2_arm || BR2_armeb
 233         default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
 234         default BR2_ARM_EABI
 235         help
 236           Application Binary Interface to use. The Application Binary
 237           Interface describes the calling conventions (how arguments
 238           are passed to functions, how the return value is passed, how
 239           system calls are made, etc.).
 240
 241 config BR2_ARM_EABI
 242         bool "EABI"
 243         help
 244           The EABI is currently the standard ARM ABI, which is used in
 245           most projects. It supports both the 'soft' floating point
 246           model (in which floating point instructions are emulated in
 247           software) and the 'softfp' floating point model (in which
 248           floating point instructions are executed using an hardware
 249           floating point unit, but floating point arguments to
 250           functions are passed in integer registers).
 251
 252           The 'softfp' floating point model is link-compatible with
 253           the 'soft' floating point model, i.e you can link a library
 254           built 'soft' with some other code built 'softfp'.
 255
 256           However, passing the floating point arguments in integer
 257           registers is a bit inefficient, so if your ARM processor has
 258           a floating point unit, and you don't have pre-compiled
 259           'soft' or 'softfp' code, using the EABIhf ABI will provide
 260           better floating point performances.
 261
 262           If your processor does not have a floating point unit, then
 263           you must use this ABI.
 264
 265 config BR2_ARM_EABIHF
 266         bool "EABIhf"
 267         depends on BR2_ARM_CPU_HAS_VFPV2
 268         help
 269           The EABIhf is an extension of EABI which supports the 'hard'
 270           floating point model. This model uses the floating point
 271           unit to execute floating point instructions, and passes
 272           floating point arguments in floating point registers.
 273
 274           It is more efficient than EABI for floating point related
 275           workload. However, it does not allow to link against code
 276           that has been pre-built for the 'soft' or 'softfp' floating
 277           point models.
 278
 279           If your processor has a floating point unit, and you don't
 280           depend on existing pre-compiled code, this option is most
 281           likely the best choice.
 282
 283 endchoice
 284
 285 choice
 286         prompt "Floating point strategy"
 287         depends on BR2_ARM_EABI || BR2_ARM_EABIHF
 288         default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 289         default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 290         default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
 291         default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
 292
 293 config BR2_ARM_SOFT_FLOAT
 294         bool "Soft float"
 295         depends on BR2_ARM_EABI
 296         select BR2_SOFT_FLOAT
 297         help
 298           This option allows to use software emulated floating
 299           point. It should be used for ARM cores that do not include a
 300           Vector Floating Point unit, such as ARMv5 cores (ARM926 for
 301           example) or certain ARMv6 cores.
 302
 303 config BR2_ARM_FPU_VFPV2
 304         bool "VFPv2"
 305         depends on BR2_ARM_CPU_HAS_VFPV2
 306         help
 307           This option allows to use the VFPv2 floating point unit, as
 308           available in some ARMv5 processors (ARM926EJ-S) and some
 309           ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
 310           MPCore).
 311
 312           Note that this option is also safe to use for newer cores
 313           such as Cortex-A, because the VFPv3 and VFPv4 units are
 314           backward compatible with VFPv2.
 315
 316 config BR2_ARM_FPU_VFPV3
 317         bool "VFPv3"
 318         depends on BR2_ARM_CPU_HAS_VFPV3
 319         help
 320           This option allows to use the VFPv3 floating point unit, as
 321           available in some ARMv7 processors (Cortex-A{8, 9}). This
 322           option requires a VFPv3 unit that has 32 double-precision
 323           registers, which is not necessarily the case in all SOCs
 324           based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
 325           instead, which is guaranteed to work on all Cortex-A{8, 9}.
 326
 327           Note that this option is also safe to use for newer cores
 328           that have a VFPv4 unit, because VFPv4 is backward compatible
 329           with VFPv3. They must of course also have 32
 330           double-precision registers.
 331
 332 config BR2_ARM_FPU_VFPV3D16
 333         bool "VFPv3-D16"
 334         depends on BR2_ARM_CPU_HAS_VFPV3
 335         help
 336           This option allows to use the VFPv3 floating point unit, as
 337           available in some ARMv7 processors (Cortex-A{8, 9}). This
 338           option requires a VFPv3 unit that has 16 double-precision
 339           registers, which is generally the case in all SOCs based on
 340           Cortex-A{8, 9}, even though VFPv3 is technically optional on
 341           Cortex-A9. This is the safest option for those cores.
 342
 343           Note that this option is also safe to use for newer cores
 344           such that have a VFPv4 unit, because the VFPv4 is backward
 345           compatible with VFPv3.
 346
 347 config BR2_ARM_FPU_VFPV4
 348         bool "VFPv4"
 349         depends on BR2_ARM_CPU_HAS_VFPV4
 350         help
 351           This option allows to use the VFPv4 floating point unit, as
 352           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 353           15}). This option requires a VFPv4 unit that has 32
 354           double-precision registers, which is not necessarily the
 355           case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
 356           unsure, you should probably use VFPv4-D16 instead.
 357
 358           Note that if you want binary code that works on all ARMv7
 359           cores, including the earlier Cortex-A{8, 9}, you should
 360           instead select VFPv3.
 361
 362 config BR2_ARM_FPU_VFPV4D16
 363         bool "VFPv4-D16"
 364         depends on BR2_ARM_CPU_HAS_VFPV4
 365         help
 366           This option allows to use the VFPv4 floating point unit, as
 367           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 368           15}). This option requires a VFPv4 unit that has 16
 369           double-precision registers, which is always available on
 370           Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
 371           Cortex-A7.
 372
 373           Note that if you want binary code that works on all ARMv7
 374           cores, including the earlier Cortex-A{8, 9}, you should
 375           instead select VFPv3-D16.
 376
 377 config BR2_ARM_FPU_NEON
 378         bool "NEON"
 379         depends on BR2_ARM_CPU_HAS_NEON
 380         help
 381           This option allows to use the NEON SIMD unit, as available
 382           in some ARMv7 processors, as a floating-point unit. It
 383           should however be noted that using NEON for floating point
 384           operations doesn't provide a complete compatibility with the
 385           IEEE 754.
 386
 387 config BR2_ARM_FPU_NEON_VFPV4
 388         bool "NEON/VFPv4"
 389         depends on BR2_ARM_CPU_HAS_VFPV4
 390         depends on BR2_ARM_CPU_HAS_NEON
 391         help
 392           This option allows to use both the VFPv4 and the NEON SIMD
 393           units for floating point operations. Note that some ARMv7
 394           cores do not necessarily have VFPv4 and/or NEON support, for
 395           example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 396           NEON is optional.
 397
 398 endchoice
 399
 400 choice
 401         prompt "ARM instruction set"
 402
 403 config BR2_ARM_INSTRUCTIONS_ARM
 404         bool "ARM"
 405         depends on BR2_ARM_CPU_HAS_ARM
 406         help
 407           This option instructs the compiler to generate regular ARM
 408           instructions, that are all 32 bits wide.
 409
 410 config BR2_ARM_INSTRUCTIONS_THUMB
 411         bool "Thumb"
 412         depends on BR2_ARM_CPU_HAS_THUMB
 413         # Thumb-1 and VFP are not compatible
 414         depends on BR2_ARM_SOFT_FLOAT
 415         help
 416           This option instructions the compiler to generate Thumb
 417           instructions, which allows to mix 16 bits instructions and
 418           32 bits instructions. This generally provides a much smaller
 419           compiled binary size.
 420
 421 comment "Thumb1 is not compatible with VFP"
 422         depends on BR2_ARM_CPU_HAS_THUMB
 423         depends on !BR2_ARM_SOFT_FLOAT
 424
 425 config BR2_ARM_INSTRUCTIONS_THUMB2
 426         bool "Thumb2"
 427         depends on BR2_ARM_CPU_HAS_THUMB2
 428         help
 429           This option instructions the compiler to generate Thumb2
 430           instructions, which allows to mix 16 bits instructions and
 431           32 bits instructions. This generally provides a much smaller
 432           compiled binary size.
 433
 434 endchoice
 435
 436 config BR2_ARCH
 437         default "arm"   if BR2_arm
 438         default "armeb" if BR2_armeb
 439
 440 config BR2_ENDIAN
 441         default "LITTLE" if BR2_arm
 442         default "BIG"    if BR2_armeb
 443
 444 config BR2_GCC_TARGET_CPU
 445         default "arm920t"       if BR2_arm920t
 446         default "arm922t"       if BR2_arm922t
 447         default "arm926ej-s"    if BR2_arm926t
 448         default "arm1136j-s"    if BR2_arm1136j_s
 449         default "arm1136jf-s"   if BR2_arm1136jf_s
 450         default "arm1176jz-s"   if BR2_arm1176jz_s
 451         default "arm1176jzf-s"  if BR2_arm1176jzf_s
 452         default "mpcore"        if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
 453         default "mpcorenovfp"   if BR2_arm11mpcore
 454         default "cortex-a5"     if BR2_cortex_a5
 455         default "cortex-a7"     if BR2_cortex_a7
 456         default "cortex-a8"     if BR2_cortex_a8
 457         default "cortex-a9"     if BR2_cortex_a9
 458         default "cortex-a12"    if BR2_cortex_a12
 459         default "cortex-a15"    if BR2_cortex_a15
 460         default "cortex-a17"    if BR2_cortex_a17
 461         default "cortex-m3"     if BR2_cortex_m3
 462         default "cortex-m4"     if BR2_cortex_m4
 463         default "fa526"         if BR2_fa526
 464         default "marvell-pj4"   if BR2_pj4
 465         default "strongarm"     if BR2_strongarm
 466         default "xscale"        if BR2_xscale
 467         default "iwmmxt"        if BR2_iwmmxt
 468
 469 config BR2_GCC_TARGET_ABI
 470         default "aapcs-linux"
 471
 472 config BR2_GCC_TARGET_FPU
 473         default "vfp"           if BR2_ARM_FPU_VFPV2
 474         default "vfpv3"         if BR2_ARM_FPU_VFPV3
 475         default "vfpv3-d16"     if BR2_ARM_FPU_VFPV3D16
 476         default "vfpv4"         if BR2_ARM_FPU_VFPV4
 477         default "vfpv4-d16"     if BR2_ARM_FPU_VFPV4D16
 478         default "neon"          if BR2_ARM_FPU_NEON
 479         default "neon-vfpv4"    if BR2_ARM_FPU_NEON_VFPV4
 480
 481 config BR2_GCC_TARGET_FLOAT_ABI
 482         default "soft"          if BR2_ARM_SOFT_FLOAT
 483         default "softfp"        if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
 484         default "hard"          if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
 485
 486 config BR2_GCC_TARGET_MODE
 487         default "arm"           if BR2_ARM_INSTRUCTIONS_ARM
 488         default "thumb"         if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2