ARM: cpu topology: Add debugfs interface for cpu_power
[cmplus.git] / arch / arm / mach-mmp / aspenite.c
blob06b5fa853c9325b81548378a7978a29cbe898a88
1 /*
2 * linux/arch/arm/mach-mmp/aspenite.c
4 * Support for the Marvell PXA168-based Aspenite and Zylonite2
5 * Development Platform.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * publishhed by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
15 #include <linux/smc91x.h>
16 #include <linux/mtd/mtd.h>
17 #include <linux/mtd/partitions.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/interrupt.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/arch.h>
23 #include <mach/addr-map.h>
24 #include <mach/mfp-pxa168.h>
25 #include <mach/pxa168.h>
26 #include <mach/gpio.h>
27 #include <video/pxa168fb.h>
28 #include <linux/input.h>
29 #include <plat/pxa27x_keypad.h>
31 #include "common.h"
33 static unsigned long common_pin_config[] __initdata = {
34 /* Data Flash Interface */
35 GPIO0_DFI_D15,
36 GPIO1_DFI_D14,
37 GPIO2_DFI_D13,
38 GPIO3_DFI_D12,
39 GPIO4_DFI_D11,
40 GPIO5_DFI_D10,
41 GPIO6_DFI_D9,
42 GPIO7_DFI_D8,
43 GPIO8_DFI_D7,
44 GPIO9_DFI_D6,
45 GPIO10_DFI_D5,
46 GPIO11_DFI_D4,
47 GPIO12_DFI_D3,
48 GPIO13_DFI_D2,
49 GPIO14_DFI_D1,
50 GPIO15_DFI_D0,
52 /* Static Memory Controller */
53 GPIO18_SMC_nCS0,
54 GPIO34_SMC_nCS1,
55 GPIO23_SMC_nLUA,
56 GPIO25_SMC_nLLA,
57 GPIO28_SMC_RDY,
58 GPIO29_SMC_SCLK,
59 GPIO35_SMC_BE1,
60 GPIO36_SMC_BE2,
61 GPIO27_GPIO, /* Ethernet IRQ */
63 /* UART1 */
64 GPIO107_UART1_RXD,
65 GPIO108_UART1_TXD,
67 /* SSP1 */
68 GPIO113_I2S_MCLK,
69 GPIO114_I2S_FRM,
70 GPIO115_I2S_BCLK,
71 GPIO116_I2S_RXD,
72 GPIO117_I2S_TXD,
74 /* LCD */
75 GPIO56_LCD_FCLK_RD,
76 GPIO57_LCD_LCLK_A0,
77 GPIO58_LCD_PCLK_WR,
78 GPIO59_LCD_DENA_BIAS,
79 GPIO60_LCD_DD0,
80 GPIO61_LCD_DD1,
81 GPIO62_LCD_DD2,
82 GPIO63_LCD_DD3,
83 GPIO64_LCD_DD4,
84 GPIO65_LCD_DD5,
85 GPIO66_LCD_DD6,
86 GPIO67_LCD_DD7,
87 GPIO68_LCD_DD8,
88 GPIO69_LCD_DD9,
89 GPIO70_LCD_DD10,
90 GPIO71_LCD_DD11,
91 GPIO72_LCD_DD12,
92 GPIO73_LCD_DD13,
93 GPIO74_LCD_DD14,
94 GPIO75_LCD_DD15,
95 GPIO76_LCD_DD16,
96 GPIO77_LCD_DD17,
97 GPIO78_LCD_DD18,
98 GPIO79_LCD_DD19,
99 GPIO80_LCD_DD20,
100 GPIO81_LCD_DD21,
101 GPIO82_LCD_DD22,
102 GPIO83_LCD_DD23,
104 /* Keypad */
105 GPIO109_KP_MKIN1,
106 GPIO110_KP_MKIN0,
107 GPIO111_KP_MKOUT7,
108 GPIO112_KP_MKOUT6,
109 GPIO121_KP_MKIN4,
112 static struct smc91x_platdata smc91x_info = {
113 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
116 static struct resource smc91x_resources[] = {
117 [0] = {
118 .start = SMC_CS1_PHYS_BASE + 0x300,
119 .end = SMC_CS1_PHYS_BASE + 0xfffff,
120 .flags = IORESOURCE_MEM,
122 [1] = {
123 .start = gpio_to_irq(27),
124 .end = gpio_to_irq(27),
125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
129 static struct platform_device smc91x_device = {
130 .name = "smc91x",
131 .id = 0,
132 .dev = {
133 .platform_data = &smc91x_info,
135 .num_resources = ARRAY_SIZE(smc91x_resources),
136 .resource = smc91x_resources,
139 static struct mtd_partition aspenite_nand_partitions[] = {
141 .name = "bootloader",
142 .offset = 0,
143 .size = SZ_1M,
144 .mask_flags = MTD_WRITEABLE,
145 }, {
146 .name = "reserved",
147 .offset = MTDPART_OFS_APPEND,
148 .size = SZ_128K,
149 .mask_flags = MTD_WRITEABLE,
150 }, {
151 .name = "reserved",
152 .offset = MTDPART_OFS_APPEND,
153 .size = SZ_8M,
154 .mask_flags = MTD_WRITEABLE,
155 }, {
156 .name = "kernel",
157 .offset = MTDPART_OFS_APPEND,
158 .size = (SZ_2M + SZ_1M),
159 .mask_flags = 0,
160 }, {
161 .name = "filesystem",
162 .offset = MTDPART_OFS_APPEND,
163 .size = SZ_48M,
164 .mask_flags = 0,
168 static struct pxa3xx_nand_platform_data aspenite_nand_info = {
169 .enable_arbiter = 1,
170 .parts = aspenite_nand_partitions,
171 .nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
174 static struct i2c_board_info aspenite_i2c_info[] __initdata = {
175 { I2C_BOARD_INFO("wm8753", 0x1b), },
178 static struct fb_videomode video_modes[] = {
179 [0] = {
180 .pixclock = 30120,
181 .refresh = 60,
182 .xres = 800,
183 .yres = 480,
184 .hsync_len = 1,
185 .left_margin = 215,
186 .right_margin = 40,
187 .vsync_len = 1,
188 .upper_margin = 34,
189 .lower_margin = 10,
190 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
194 struct pxa168fb_mach_info aspenite_lcd_info = {
195 .id = "Graphic Frame",
196 .modes = video_modes,
197 .num_modes = ARRAY_SIZE(video_modes),
198 .pix_fmt = PIX_FMT_RGB565,
199 .io_pin_allocation_mode = PIN_MODE_DUMB_24,
200 .dumb_mode = DUMB_MODE_RGB888,
201 .active = 1,
202 .panel_rbswap = 0,
203 .invert_pixclock = 0,
206 static unsigned int aspenite_matrix_key_map[] = {
207 KEY(0, 6, KEY_UP), /* SW 4 */
208 KEY(0, 7, KEY_DOWN), /* SW 5 */
209 KEY(1, 6, KEY_LEFT), /* SW 6 */
210 KEY(1, 7, KEY_RIGHT), /* SW 7 */
211 KEY(4, 6, KEY_ENTER), /* SW 8 */
212 KEY(4, 7, KEY_ESC), /* SW 9 */
215 static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
216 .matrix_key_rows = 5,
217 .matrix_key_cols = 8,
218 .matrix_key_map = aspenite_matrix_key_map,
219 .matrix_key_map_size = ARRAY_SIZE(aspenite_matrix_key_map),
220 .debounce_interval = 30,
223 static void __init common_init(void)
225 mfp_config(ARRAY_AND_SIZE(common_pin_config));
227 /* on-chip devices */
228 pxa168_add_uart(1);
229 pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
230 pxa168_add_ssp(1);
231 pxa168_add_nand(&aspenite_nand_info);
232 pxa168_add_fb(&aspenite_lcd_info);
233 pxa168_add_keypad(&aspenite_keypad_info);
235 /* off-chip devices */
236 platform_device_register(&smc91x_device);
239 MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
240 .map_io = mmp_map_io,
241 .nr_irqs = IRQ_BOARD_START,
242 .init_irq = pxa168_init_irq,
243 .timer = &pxa168_timer,
244 .init_machine = common_init,
245 MACHINE_END
247 MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
248 .map_io = mmp_map_io,
249 .nr_irqs = IRQ_BOARD_START,
250 .init_irq = pxa168_init_irq,
251 .timer = &pxa168_timer,
252 .init_machine = common_init,
253 MACHINE_END