ARM: cpu topology: Add debugfs interface for cpu_power
[cmplus.git] / arch / arm / mach-omap2 / clock.h
blob450aabf46093aebea128b08cfab5dcdbce52c8a5
1 /*
2 * linux/arch/arm/mach-omap2/clock.h
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 * Copyright (C) 2004-2011 Nokia Corporation
7 * Contacts:
8 * Richard Woodruff <r-woodruff2@ti.com>
9 * Paul Walmsley
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H
17 #define __ARCH_ARM_MACH_OMAP2_CLOCK_H
19 #include <plat/clock.h>
21 /* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
22 #define CORE_CLK_SRC_32K 0x0
23 #define CORE_CLK_SRC_DPLL 0x1
24 #define CORE_CLK_SRC_DPLL_X2 0x2
26 /* OMAP2xxx CM_CLKEN_PLL.EN_DPLL bits - for omap2_get_dpll_rate() */
27 #define OMAP2XXX_EN_DPLL_LPBYPASS 0x1
28 #define OMAP2XXX_EN_DPLL_FRBYPASS 0x2
29 #define OMAP2XXX_EN_DPLL_LOCKED 0x3
31 /* OMAP3xxx CM_CLKEN_PLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */
32 #define OMAP3XXX_EN_DPLL_LPBYPASS 0x5
33 #define OMAP3XXX_EN_DPLL_FRBYPASS 0x6
34 #define OMAP3XXX_EN_DPLL_LOCKED 0x7
36 /* OMAP4xxx CM_CLKMODE_DPLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */
37 #define OMAP4XXX_EN_DPLL_MNBYPASS 0x4
38 #define OMAP4XXX_EN_DPLL_LPBYPASS 0x5
39 #define OMAP4XXX_EN_DPLL_FRBYPASS 0x6
40 #define OMAP4XXX_EN_DPLL_LOCKED 0x7
42 /* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */
43 #define DPLL_LOW_POWER_STOP 0x1
44 #define DPLL_MN_BYPASS 0x4
45 #define DPLL_LOW_POWER_BYPASS 0x5
46 #define DPLL_LOCKED 0x7
48 /* DPLL Type and DCO Selection Flags */
49 #define DPLL_J_TYPE 0x1
51 int omap2_clk_enable(struct clk *clk);
52 void omap2_clk_disable(struct clk *clk);
53 long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
54 int omap2_clk_set_rate(struct clk *clk, unsigned long rate);
55 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent);
56 long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate);
57 unsigned long omap3_dpll_recalc(struct clk *clk);
58 unsigned long omap3_clkoutx2_recalc(struct clk *clk);
59 void omap3_dpll_allow_idle(struct clk *clk);
60 void omap3_dpll_deny_idle(struct clk *clk);
61 u32 omap3_dpll_autoidle_read(struct clk *clk);
62 int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate);
63 int omap3_noncore_dpll_enable(struct clk *clk);
64 void omap3_noncore_dpll_disable(struct clk *clk);
65 int omap4_dpllmx_gatectrl_read(struct clk *clk);
66 void omap4_dpllmx_allow_gatectrl(struct clk *clk);
67 void omap4_dpllmx_deny_gatectrl(struct clk *clk);
68 int omap4460_mpu_dpll_set_rate(struct clk *clk, unsigned long rate);
69 long omap4460_mpu_dpll_round_rate(struct clk *clk, unsigned long rate);
70 unsigned long omap4460_mpu_dpll_recalc(struct clk *clk);
71 long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate);
72 unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk);
74 #ifdef CONFIG_OMAP_RESET_CLOCKS
75 void omap2_clk_disable_unused(struct clk *clk);
76 #else
77 #define omap2_clk_disable_unused NULL
78 #endif
80 void omap2_init_clk_clkdm(struct clk *clk);
82 /* clkt_clksel.c public functions */
83 u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
84 u32 *new_div);
85 void omap2_init_clksel_parent(struct clk *clk);
86 unsigned long omap2_clksel_recalc(struct clk *clk);
87 long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
88 int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
89 int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent);
91 /* clkt_iclk.c public functions */
92 extern void omap2_clkt_iclk_allow_idle(struct clk *clk);
93 extern void omap2_clkt_iclk_deny_idle(struct clk *clk);
95 u32 omap2_get_dpll_rate(struct clk *clk);
96 void omap2_init_dpll_parent(struct clk *clk);
98 int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
101 #ifdef CONFIG_ARCH_OMAP2
102 void omap2xxx_clk_prepare_for_reboot(void);
103 #else
104 static inline void omap2xxx_clk_prepare_for_reboot(void)
107 #endif
109 #ifdef CONFIG_ARCH_OMAP3
110 void omap3_clk_prepare_for_reboot(void);
111 #else
112 static inline void omap3_clk_prepare_for_reboot(void)
115 #endif
117 #ifdef CONFIG_ARCH_OMAP4
118 void omap4_clk_prepare_for_reboot(void);
119 #else
120 static inline void omap4_clk_prepare_for_reboot(void)
123 #endif
125 int omap2_dflt_clk_enable(struct clk *clk);
126 void omap2_dflt_clk_disable(struct clk *clk);
127 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
128 u8 *other_bit);
129 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
130 u8 *idlest_bit, u8 *idlest_val);
131 int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
132 void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
133 const char *core_ck_name,
134 const char *mpu_ck_name);
136 extern u8 cpu_mask;
138 extern const struct clkops clkops_omap2_dflt_wait;
139 extern const struct clkops clkops_dummy;
140 extern const struct clkops clkops_omap2_dflt;
141 extern const struct clkops clkops_omap4_dflt_wait;
143 extern struct clk_functions omap2_clk_functions;
144 extern struct clk *vclk, *sclk;
146 extern const struct clksel_rate gpt_32k_rates[];
147 extern const struct clksel_rate gpt_sys_rates[];
148 extern const struct clksel_rate gfx_l3_rates[];
149 extern const struct clksel_rate dsp_ick_rates[];
151 #ifdef CONFIG_CPU_FREQ
153 #ifdef CONFIG_ARCH_OMAP2
154 extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
155 extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
156 #else
157 #define omap2_clk_init_cpufreq_table 0
158 #define omap2_clk_exit_cpufreq_table 0
159 #endif
161 #ifdef CONFIG_ARCH_OMAP3
162 extern void omap3_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
163 extern void omap3_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
164 #else
165 #define omap3_clk_init_cpufreq_table 0
166 #define omap3_clk_exit_cpufreq_table 0
167 #endif
169 #endif /* CONFIG_CPU_FREQ */
171 extern const struct clkops clkops_omap2_iclk_dflt_wait;
172 extern const struct clkops clkops_omap2_iclk_dflt;
173 extern const struct clkops clkops_omap2_iclk_idle_only;
174 extern const struct clkops clkops_omap2_mdmclk_dflt_wait;
175 extern const struct clkops clkops_omap2xxx_dpll_ops;
176 extern const struct clkops clkops_omap3_noncore_dpll_ops;
177 extern const struct clkops clkops_omap3_core_dpll_ops;
178 extern const struct clkops clkops_omap4_dpllmx_ops;
180 #endif