arch/arm/mach-omap2/powerdomain.h

   1 /*
   2  * OMAP2/3/4 powerdomain control
   3  *
   4  * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
   5  * Copyright (C) 2007-2011 Nokia Corporation
   6  *
   7  * Paul Walmsley
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * XXX This should be moved to the mach-omap2/ directory at the earliest
  14  * opportunity.
  15  */
  16
  17 #ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
  18 #define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
  19
  20 #include <linux/types.h>
  21 #include <linux/list.h>
  22 #include <linux/plist.h>
  23 #include <linux/mutex.h>
  24 #include <linux/spinlock.h>
  25
  26 #include <linux/atomic.h>
  27
  28 #include <plat/cpu.h>
  29
  30 #include "voltage.h"
  31
  32 /* Powerdomain basic power states */
  33 #define PWRDM_POWER_OFF         0x0
  34 #define PWRDM_POWER_RET         0x1
  35 #define PWRDM_POWER_INACTIVE    0x2
  36 #define PWRDM_POWER_ON          0x3
  37
  38 #define PWRDM_MAX_PWRSTS        4
  39
  40 /* Powerdomain allowable state bitfields */
  41 #define PWRSTS_ON               (1 << PWRDM_POWER_ON)
  42 #define PWRSTS_INACTIVE         (1 << PWRDM_POWER_INACTIVE)
  43 #define PWRSTS_RET              (1 << PWRDM_POWER_RET)
  44 #define PWRSTS_OFF              (1 << PWRDM_POWER_OFF)
  45
  46 #define PWRSTS_OFF_ON           (PWRSTS_OFF | PWRSTS_ON)
  47 #define PWRSTS_OFF_RET          (PWRSTS_OFF | PWRSTS_RET)
  48 #define PWRSTS_RET_ON           (PWRSTS_RET | PWRSTS_ON)
  49 #define PWRSTS_OFF_RET_ON       (PWRSTS_OFF_RET | PWRSTS_ON)
  50
  51 #define PWRSTS_RET_INA_ON       ((1 << PWRDM_POWER_RET) | \
  52                                  (1 << PWRDM_POWER_INACTIVE)  | \
  53                                  (1 << PWRDM_POWER_ON))
  54
  55 #define PWRSTS_OFF_INA_ON       ((1 << PWRDM_POWER_OFF) | \
  56                                  (1 << PWRDM_POWER_INACTIVE)  | \
  57                                  (1 << PWRDM_POWER_ON))
  58
  59 #define PWRSTS_OFF_RET_INA_ON   ((1 << PWRDM_POWER_OFF) | \
  60                                  (1 << PWRDM_POWER_RET) | \
  61                                  (1 << PWRDM_POWER_INACTIVE)  | \
  62                                  (1 << PWRDM_POWER_ON))
  63
  64 /* Powerdomain flags */
  65 #define PWRDM_HAS_HDWR_SAR      (1 << 0) /* hardware save-and-restore support */
  66 #define PWRDM_HAS_MPU_QUIRK     (1 << 1) /* MPU pwr domain has MEM bank 0 bits
  67                                           * in MEM bank 1 position. This is
  68                                           * true for OMAP3430
  69                                           */
  70 #define PWRDM_HAS_LOWPOWERSTATECHANGE   (1 << 2) /*
  71                                                   * support to transition from a
  72                                                   * sleep state to a lower sleep
  73                                                   * state without waking up the
  74                                                   * powerdomain
  75                                                   */
  76
  77 /*
  78  * Number of memory banks that are power-controllable.  On OMAP4430, the
  79  * maximum is 5.
  80  */
  81 #define PWRDM_MAX_MEM_BANKS     5
  82
  83 /*
  84  * Maximum number of clockdomains that can be associated with a powerdomain.
  85  * CORE powerdomain on OMAP4 is the worst case
  86  */
  87 #define PWRDM_MAX_CLKDMS        9
  88
  89 /* XXX A completely arbitrary number. What is reasonable here? */
  90 #define PWRDM_TRANSITION_BAILOUT 100000
  91
  92 /* Powerdomain functional power states */
  93 #define PWRDM_FUNC_PWRST_OFF    0x0
  94 #define PWRDM_FUNC_PWRST_OSWR   0x1
  95 #define PWRDM_FUNC_PWRST_CSWR   0x2
  96 #define PWRDM_FUNC_PWRST_ON     0x3
  97
  98 #define PWRDM_MAX_FUNC_PWRSTS   4
  99
 100 #define UNSUP_STATE -1
 101
 102 struct clockdomain;
 103 struct powerdomain;
 104
 105 struct powerdomain_count_stats {
 106         unsigned state[PWRDM_MAX_PWRSTS];
 107         unsigned ret_logic_off;
 108         unsigned ret_mem_off[PWRDM_MAX_MEM_BANKS];
 109 };
 110
 111 struct powerdomain_time_stats {
 112         s64 state[PWRDM_MAX_PWRSTS];
 113 };
 114
 115 /**
 116  * struct powerdomain - OMAP powerdomain
 117  * @name: Powerdomain name
 118  * @voltdm: voltagedomain containing this powerdomain
 119  * @omap_chip: represents the OMAP chip types containing this pwrdm
 120  * @prcm_offs: the address offset from CM_BASE/PRM_BASE
 121  * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
 122  * @pwrsts: Possible powerdomain power states
 123  * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
 124  * @flags: Powerdomain flags
 125  * @banks: Number of software-controllable memory banks in this powerdomain
 126  * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
 127  * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
 128  * @pwrdm_clkdms: Clockdomains in this powerdomain
 129  * @node: list_head linking all powerdomains
 130  * @voltdm_node: list_head linking all powerdomains in a voltagedomain
 131  * @state:
 132  * @state_counter:
 133  * @timer:
 134  * @state_timer:
 135  * @wakeup_lat: Wakeup latencies for possible powerdomain power states
 136  * @wakeuplat_lock: spinlock for plist
 137  * @wakeuplat_dev_list: plist_head linking all devices placing constraint
 138  * @wa * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
 139  */
 140 struct powerdomain {
 141         const char *name;
 142         union {
 143                 const char *name;
 144                 struct voltagedomain *ptr;
 145         } voltdm;
 146         const struct omap_chip_id omap_chip;
 147         const s16 prcm_offs;
 148         const u8 pwrsts;
 149         const u8 pwrsts_logic_ret;
 150         const u8 flags;
 151         const u8 banks;
 152         const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
 153         const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
 154         const u8 prcm_partition;
 155         struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
 156         struct list_head node;
 157         struct list_head voltdm_node;
 158         int state;
 159
 160         struct powerdomain_count_stats count;
 161         struct powerdomain_count_stats last_count;
 162
 163 #ifdef CONFIG_PM_DEBUG
 164         s64 timer;
 165         struct powerdomain_time_stats time;
 166         struct powerdomain_time_stats last_time;
 167 #endif
 168         const u32 wakeup_lat[PWRDM_MAX_FUNC_PWRSTS];
 169         spinlock_t wakeuplat_lock;
 170         struct plist_head wakeuplat_dev_list;
 171         struct mutex wakeuplat_mutex;
 172 };
 173
 174 struct wakeuplat_dev_list {
 175         struct device *dev;
 176         unsigned long constraint_us;
 177         struct plist_node node;
 178 };
 179
 180 /**
 181  * struct pwrdm_ops - Arch specific function implementations
 182  * @pwrdm_set_next_pwrst: Set the target power state for a pd
 183  * @pwrdm_read_next_pwrst: Read the target power state set for a pd
 184  * @pwrdm_read_pwrst: Read the current power state of a pd
 185  * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
 186  * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
 187  * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
 188  * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
 189  * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
 190  * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
 191  * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
 192  * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
 193  * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
 194  * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
 195  * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
 196  * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
 197  * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
 198  * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
 199  * @pwrdm_wait_transition: Wait for a pd state transition to complete
 200  */
 201 struct pwrdm_ops {
 202         int     (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
 203         int     (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
 204         int     (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
 205         int     (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
 206         int     (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
 207         int     (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 208         int     (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 209         int     (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm);
 210         int     (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm);
 211         int     (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm);
 212         int     (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
 213         int     (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
 214         int     (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank);
 215         int     (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm);
 216         int     (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm);
 217         int     (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
 218         int     (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
 219         int     (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
 220 };
 221
 222 void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs);
 223
 224 struct powerdomain *pwrdm_lookup(const char *name);
 225
 226 int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
 227                         void *user);
 228 int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
 229                         void *user);
 230
 231 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 232 int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 233 int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
 234                          int (*fn)(struct powerdomain *pwrdm,
 235                                    struct clockdomain *clkdm));
 236 struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm);
 237
 238 int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
 239
 240 int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
 241 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
 242 int pwrdm_read_pwrst(struct powerdomain *pwrdm);
 243 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
 244 int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
 245
 246 int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
 247 int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 248 int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 249
 250 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
 251 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
 252 int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
 253 int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
 254 int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
 255 int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
 256
 257 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
 258 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
 259 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
 260
 261 int pwrdm_wait_transition(struct powerdomain *pwrdm);
 262
 263 int pwrdm_state_switch(struct powerdomain *pwrdm);
 264 int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
 265 int pwrdm_pre_transition(void);
 266 int pwrdm_post_transition(void);
 267 int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
 268 int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
 269 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
 270
 271 extern void omap2xxx_powerdomains_init(void);
 272 extern void omap3xxx_powerdomains_init(void);
 273 extern void omap44xx_powerdomains_init(void);
 274
 275 extern struct pwrdm_ops omap2_pwrdm_operations;
 276 extern struct pwrdm_ops omap3_pwrdm_operations;
 277 extern struct pwrdm_ops omap4_pwrdm_operations;
 278
 279 /* Common Internal functions used across OMAP rev's */
 280 extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
 281 extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
 282 extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
 283
 284 extern struct powerdomain wkup_omap2_pwrdm;
 285 extern struct powerdomain gfx_omap2_pwrdm;
 286
 287 int pwrdm_wakeuplat_set_constraint(struct powerdomain *pwrdm,
 288                                    struct device *dev, unsigned long t);
 289 int pwrdm_wakeuplat_release_constraint(struct powerdomain *pwrdm,
 290                                        struct device *dev);
 291 int pwrdm_wakeuplat_update_pwrst(struct powerdomain *pwrdm);
 292
 293 #endif