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ARM: cpu topology: Add debugfs interface for cpu_power
[cmplus.git] / arch / arm / mach-pxa / mainstone.c
blob3479e2b3b51195ee51c40962604aecfc68a35a35
1 /*
2 * linux/arch/arm/mach-pxa/mainstone.c
3 *
4 * Support for the Intel HCDDBBVA0 Development Platform.
5 * (go figure how they came up with such name...)
6 *
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/syscore_ops.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
22 #include <linux/fb.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/input.h>
27 #include <linux/gpio_keys.h>
28 #include <linux/pwm_backlight.h>
29 #include <linux/smc91x.h>
30 #include <linux/i2c/pxa-i2c.h>
31
32 #include <asm/types.h>
33 #include <asm/setup.h>
34 #include <asm/memory.h>
35 #include <asm/mach-types.h>
36 #include <mach/hardware.h>
37 #include <asm/irq.h>
38 #include <asm/sizes.h>
39
40 #include <asm/mach/arch.h>
41 #include <asm/mach/map.h>
42 #include <asm/mach/irq.h>
43 #include <asm/mach/flash.h>
44
45 #include <mach/pxa27x.h>
46 #include <mach/gpio.h>
47 #include <mach/mainstone.h>
48 #include <mach/audio.h>
49 #include <mach/pxafb.h>
50 #include <mach/mmc.h>
51 #include <mach/irda.h>
52 #include <mach/ohci.h>
53 #include <plat/pxa27x_keypad.h>
54 #include <mach/smemc.h>
55
56 #include "generic.h"
57 #include "devices.h"
58
59 static unsigned long mainstone_pin_config[] = {
60 /* Chip Select */
61 GPIO15_nCS_1,
62
63 /* LCD - 16bpp Active TFT */
64 GPIOxx_LCD_TFT_16BPP,
65 GPIO16_PWM0_OUT, /* Backlight */
66
67 /* MMC */
68 GPIO32_MMC_CLK,
69 GPIO112_MMC_CMD,
70 GPIO92_MMC_DAT_0,
71 GPIO109_MMC_DAT_1,
72 GPIO110_MMC_DAT_2,
73 GPIO111_MMC_DAT_3,
74
75 /* USB Host Port 1 */
76 GPIO88_USBH1_PWR,
77 GPIO89_USBH1_PEN,
78
79 /* PC Card */
80 GPIO48_nPOE,
81 GPIO49_nPWE,
82 GPIO50_nPIOR,
83 GPIO51_nPIOW,
84 GPIO85_nPCE_1,
85 GPIO54_nPCE_2,
86 GPIO79_PSKTSEL,
87 GPIO55_nPREG,
88 GPIO56_nPWAIT,
89 GPIO57_nIOIS16,
90
91 /* AC97 */
92 GPIO28_AC97_BITCLK,
93 GPIO29_AC97_SDATA_IN_0,
94 GPIO30_AC97_SDATA_OUT,
95 GPIO31_AC97_SYNC,
96 GPIO45_AC97_SYSCLK,
97
98 /* Keypad */
99 GPIO93_KP_DKIN_0,
100 GPIO94_KP_DKIN_1,
101 GPIO95_KP_DKIN_2,
102 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
103 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
104 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
105 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
106 GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
107 GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
108 GPIO103_KP_MKOUT_0,
109 GPIO104_KP_MKOUT_1,
110 GPIO105_KP_MKOUT_2,
111 GPIO106_KP_MKOUT_3,
112 GPIO107_KP_MKOUT_4,
113 GPIO108_KP_MKOUT_5,
114 GPIO96_KP_MKOUT_6,
115
116 /* I2C */
117 GPIO117_I2C_SCL,
118 GPIO118_I2C_SDA,
119
120 /* GPIO */
121 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
122 };
123
124 static unsigned long mainstone_irq_enabled;
125
126 static void mainstone_mask_irq(struct irq_data *d)
127 {
128 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
129 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
130 }
131
132 static void mainstone_unmask_irq(struct irq_data *d)
133 {
134 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
135 /* the irq can be acknowledged only if deasserted, so it's done here */
136 MST_INTSETCLR &= ~(1 << mainstone_irq);
137 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
138 }
139
140 static struct irq_chip mainstone_irq_chip = {
141 .name = "FPGA",
142 .irq_ack = mainstone_mask_irq,
143 .irq_mask = mainstone_mask_irq,
144 .irq_unmask = mainstone_unmask_irq,
145 };
146
147 static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
148 {
149 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
150 do {
151 /* clear useless edge notification */
152 desc->irq_data.chip->irq_ack(&desc->irq_data);
153 if (likely(pending)) {
154 irq = MAINSTONE_IRQ(0) + __ffs(pending);
155 generic_handle_irq(irq);
156 }
157 pending = MST_INTSETCLR & mainstone_irq_enabled;
158 } while (pending);
159 }
160
161 static void __init mainstone_init_irq(void)
162 {
163 int irq;
164
165 pxa27x_init_irq();
166
167 /* setup extra Mainstone irqs */
168 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
169 irq_set_chip_and_handler(irq, &mainstone_irq_chip,
170 handle_level_irq);
171 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
172 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
173 else
174 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
175 }
176 set_irq_flags(MAINSTONE_IRQ(8), 0);
177 set_irq_flags(MAINSTONE_IRQ(12), 0);
178
179 MST_INTMSKENA = 0;
180 MST_INTSETCLR = 0;
181
182 irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
183 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
184 }
185
186 #ifdef CONFIG_PM
187
188 static void mainstone_irq_resume(void)
189 {
190 MST_INTMSKENA = mainstone_irq_enabled;
191 }
192
193 static struct syscore_ops mainstone_irq_syscore_ops = {
194 .resume = mainstone_irq_resume,
195 };
196
197 static int __init mainstone_irq_device_init(void)
198 {
199 if (machine_is_mainstone())
200 register_syscore_ops(&mainstone_irq_syscore_ops);
201
202 return 0;
203 }
204
205 device_initcall(mainstone_irq_device_init);
206
207 #endif
208
209
210 static struct resource smc91x_resources[] = {
211 [0] = {
212 .start = (MST_ETH_PHYS + 0x300),
213 .end = (MST_ETH_PHYS + 0xfffff),
214 .flags = IORESOURCE_MEM,
215 },
216 [1] = {
217 .start = MAINSTONE_IRQ(3),
218 .end = MAINSTONE_IRQ(3),
219 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
220 }
221 };
222
223 static struct smc91x_platdata mainstone_smc91x_info = {
224 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
225 SMC91X_NOWAIT | SMC91X_USE_DMA,
226 };
227
228 static struct platform_device smc91x_device = {
229 .name = "smc91x",
230 .id = 0,
231 .num_resources = ARRAY_SIZE(smc91x_resources),
232 .resource = smc91x_resources,
233 .dev = {
234 .platform_data = &mainstone_smc91x_info,
235 },
236 };
237
238 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
239 {
240 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
241 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
242 return 0;
243 }
244
245 static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
246 {
247 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
248 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
249 }
250
251 static long mst_audio_suspend_mask;
252
253 static void mst_audio_suspend(void *priv)
254 {
255 mst_audio_suspend_mask = MST_MSCWR2;
256 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
257 }
258
259 static void mst_audio_resume(void *priv)
260 {
261 MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
262 }
263
264 static pxa2xx_audio_ops_t mst_audio_ops = {
265 .startup = mst_audio_startup,
266 .shutdown = mst_audio_shutdown,
267 .suspend = mst_audio_suspend,
268 .resume = mst_audio_resume,
269 };
270
271 static struct resource flash_resources[] = {
272 [0] = {
273 .start = PXA_CS0_PHYS,
274 .end = PXA_CS0_PHYS + SZ_64M - 1,
275 .flags = IORESOURCE_MEM,
276 },
277 [1] = {
278 .start = PXA_CS1_PHYS,
279 .end = PXA_CS1_PHYS + SZ_64M - 1,
280 .flags = IORESOURCE_MEM,
281 },
282 };
283
284 static struct mtd_partition mainstoneflash0_partitions[] = {
285 {
286 .name = "Bootloader",
287 .size = 0x00040000,
288 .offset = 0,
289 .mask_flags = MTD_WRITEABLE /* force read-only */
290 },{
291 .name = "Kernel",
292 .size = 0x00400000,
293 .offset = 0x00040000,
294 },{
295 .name = "Filesystem",
296 .size = MTDPART_SIZ_FULL,
297 .offset = 0x00440000
298 }
299 };
300
301 static struct flash_platform_data mst_flash_data[2] = {
302 {
303 .map_name = "cfi_probe",
304 .parts = mainstoneflash0_partitions,
305 .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
306 }, {
307 .map_name = "cfi_probe",
308 .parts = NULL,
309 .nr_parts = 0,
310 }
311 };
312
313 static struct platform_device mst_flash_device[2] = {
314 {
315 .name = "pxa2xx-flash",
316 .id = 0,
317 .dev = {
318 .platform_data = &mst_flash_data[0],
319 },
320 .resource = &flash_resources[0],
321 .num_resources = 1,
322 },
323 {
324 .name = "pxa2xx-flash",
325 .id = 1,
326 .dev = {
327 .platform_data = &mst_flash_data[1],
328 },
329 .resource = &flash_resources[1],
330 .num_resources = 1,
331 },
332 };
333
334 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
335 static struct platform_pwm_backlight_data mainstone_backlight_data = {
336 .pwm_id = 0,
337 .max_brightness = 1023,
338 .dft_brightness = 1023,
339 .pwm_period_ns = 78770,
340 };
341
342 static struct platform_device mainstone_backlight_device = {
343 .name = "pwm-backlight",
344 .dev = {
345 .parent = &pxa27x_device_pwm0.dev,
346 .platform_data = &mainstone_backlight_data,
347 },
348 };
349
350 static void __init mainstone_backlight_register(void)
351 {
352 int ret = platform_device_register(&mainstone_backlight_device);
353 if (ret)
354 printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
355 }
356 #else
357 #define mainstone_backlight_register() do { } while (0)
358 #endif
359
360 static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
361 .pixclock = 50000,
362 .xres = 640,
363 .yres = 480,
364 .bpp = 16,
365 .hsync_len = 1,
366 .left_margin = 0x9f,
367 .right_margin = 1,
368 .vsync_len = 44,
369 .upper_margin = 0,
370 .lower_margin = 0,
371 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
372 };
373
374 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
375 .pixclock = 110000,
376 .xres = 240,
377 .yres = 320,
378 .bpp = 16,
379 .hsync_len = 4,
380 .left_margin = 8,
381 .right_margin = 20,
382 .vsync_len = 3,
383 .upper_margin = 1,
384 .lower_margin = 10,
385 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
386 };
387
388 static struct pxafb_mach_info mainstone_pxafb_info = {
389 .num_modes = 1,
390 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
391 };
392
393 static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
394 {
395 int err;
396
397 /* make sure SD/Memory Stick multiplexer's signals
398 * are routed to MMC controller
399 */
400 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
401
402 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
403 "MMC card detect", data);
404 if (err)
405 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
406
407 return err;
408 }
409
410 static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
411 {
412 struct pxamci_platform_data* p_d = dev->platform_data;
413
414 if (( 1 << vdd) & p_d->ocr_mask) {
415 printk(KERN_DEBUG "%s: on\n", __func__);
416 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
417 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
418 } else {
419 printk(KERN_DEBUG "%s: off\n", __func__);
420 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
421 }
422 }
423
424 static void mainstone_mci_exit(struct device *dev, void *data)
425 {
426 free_irq(MAINSTONE_MMC_IRQ, data);
427 }
428
429 static struct pxamci_platform_data mainstone_mci_platform_data = {
430 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
431 .init = mainstone_mci_init,
432 .setpower = mainstone_mci_setpower,
433 .exit = mainstone_mci_exit,
434 .gpio_card_detect = -1,
435 .gpio_card_ro = -1,
436 .gpio_power = -1,
437 };
438
439 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
440 {
441 unsigned long flags;
442
443 local_irq_save(flags);
444 if (mode & IR_SIRMODE) {
445 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
446 } else if (mode & IR_FIRMODE) {
447 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
448 }
449 pxa2xx_transceiver_mode(dev, mode);
450 if (mode & IR_OFF) {
451 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
452 } else {
453 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
454 }
455 local_irq_restore(flags);
456 }
457
458 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
459 .gpio_pwdown = -1,
460 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
461 .transceiver_mode = mainstone_irda_transceiver_mode,
462 };
463
464 static struct gpio_keys_button gpio_keys_button[] = {
465 [0] = {
466 .desc = "wakeup",
467 .code = KEY_SUSPEND,
468 .type = EV_KEY,
469 .gpio = 1,
470 .wakeup = 1,
471 },
472 };
473
474 static struct gpio_keys_platform_data mainstone_gpio_keys = {
475 .buttons = gpio_keys_button,
476 .nbuttons = 1,
477 };
478
479 static struct platform_device mst_gpio_keys_device = {
480 .name = "gpio-keys",
481 .id = -1,
482 .dev = {
483 .platform_data = &mainstone_gpio_keys,
484 },
485 };
486
487 static struct platform_device *platform_devices[] __initdata = {
488 &smc91x_device,
489 &mst_flash_device[0],
490 &mst_flash_device[1],
491 &mst_gpio_keys_device,
492 };
493
494 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
495 .port_mode = PMM_PERPORT_MODE,
496 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
497 };
498
499 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
500 static unsigned int mainstone_matrix_keys[] = {
501 KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
502 KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
503 KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
504 KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
505 KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
506 KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
507 KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
508 KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
509 KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
510
511 KEY(0, 4, KEY_DOT), /* . */
512 KEY(1, 4, KEY_CLOSE), /* @ */
513 KEY(4, 4, KEY_SLASH),
514 KEY(5, 4, KEY_BACKSLASH),
515 KEY(0, 5, KEY_HOME),
516 KEY(1, 5, KEY_LEFTSHIFT),
517 KEY(2, 5, KEY_SPACE),
518 KEY(3, 5, KEY_SPACE),
519 KEY(4, 5, KEY_ENTER),
520 KEY(5, 5, KEY_BACKSPACE),
521
522 KEY(0, 6, KEY_UP),
523 KEY(1, 6, KEY_DOWN),
524 KEY(2, 6, KEY_LEFT),
525 KEY(3, 6, KEY_RIGHT),
526 KEY(4, 6, KEY_SELECT),
527 };
528
529 struct pxa27x_keypad_platform_data mainstone_keypad_info = {
530 .matrix_key_rows = 6,
531 .matrix_key_cols = 7,
532 .matrix_key_map = mainstone_matrix_keys,
533 .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
534
535 .enable_rotary0 = 1,
536 .rotary0_up_key = KEY_UP,
537 .rotary0_down_key = KEY_DOWN,
538
539 .debounce_interval = 30,
540 };
541
542 static void __init mainstone_init_keypad(void)
543 {
544 pxa_set_keypad_info(&mainstone_keypad_info);
545 }
546 #else
547 static inline void mainstone_init_keypad(void) {}
548 #endif
549
550 static void __init mainstone_init(void)
551 {
552 int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
553
554 pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
555
556 pxa_set_ffuart_info(NULL);
557 pxa_set_btuart_info(NULL);
558 pxa_set_stuart_info(NULL);
559
560 mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
561 mst_flash_data[1].width = 4;
562
563 /* Compensate for SW7 which swaps the flash banks */
564 mst_flash_data[SW7].name = "processor-flash";
565 mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
566
567 printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
568 mst_flash_data[0].name);
569
570 /* system bus arbiter setting
571 * - Core_Park
572 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
573 */
574 ARB_CNTRL = ARB_CORE_PARK | 0x234;
575
576 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
577
578 /* reading Mainstone's "Virtual Configuration Register"
579 might be handy to select LCD type here */
580 if (0)
581 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
582 else
583 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
584
585 pxa_set_fb_info(NULL, &mainstone_pxafb_info);
586 mainstone_backlight_register();
587
588 pxa_set_mci_info(&mainstone_mci_platform_data);
589 pxa_set_ficp_info(&mainstone_ficp_platform_data);
590 pxa_set_ohci_info(&mainstone_ohci_platform_data);
591 pxa_set_i2c_info(NULL);
592 pxa_set_ac97_info(&mst_audio_ops);
593
594 mainstone_init_keypad();
595 }
596
597
598 static struct map_desc mainstone_io_desc[] __initdata = {
599 { /* CPLD */
600 .virtual = MST_FPGA_VIRT,
601 .pfn = __phys_to_pfn(MST_FPGA_PHYS),
602 .length = 0x00100000,
603 .type = MT_DEVICE
604 }
605 };
606
607 static void __init mainstone_map_io(void)
608 {
609 pxa27x_map_io();
610 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
611
612 /* for use I SRAM as framebuffer. */
613 PSLR |= 0xF04;
614 PCFR = 0x66;
615 }
616
617 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
618 /* Maintainer: MontaVista Software Inc. */
619 .boot_params = 0xa0000100, /* BLOB boot parameter setting */
620 .map_io = mainstone_map_io,
621 .nr_irqs = MAINSTONE_NR_IRQS,
622 .init_irq = mainstone_init_irq,
623 .timer = &pxa_timer,
624 .init_machine = mainstone_init,
625 MACHINE_END