arch/blackfin/include/asm/cplbinit.h

   1 /*
   2  * File:         include/asm-blackfin/cplbinit.h
   3  * Based on:
   4  * Author:
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2004-2006 Analog Devices Inc.
  11  *
  12  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2 of the License, or
  17  * (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, see the file COPYING, or write
  26  * to the Free Software Foundation, Inc.,
  27  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  28  */
  29
  30 #ifndef __ASM_CPLBINIT_H__
  31 #define __ASM_CPLBINIT_H__
  32
  33 #include <asm/blackfin.h>
  34 #include <asm/cplb.h>
  35 #include <linux/threads.h>
  36
  37 #ifdef CONFIG_CPLB_SWITCH_TAB_L1
  38 # define PDT_ATTR __attribute__((l1_data))
  39 #else
  40 # define PDT_ATTR
  41 #endif
  42
  43 struct cplb_entry {
  44         unsigned long data, addr;
  45 };
  46
  47 struct cplb_boundary {
  48         unsigned long eaddr; /* End of this region.  */
  49         unsigned long data; /* CPLB data value.  */
  50 };
  51
  52 extern struct cplb_boundary dcplb_bounds[];
  53 extern struct cplb_boundary icplb_bounds[];
  54 extern int dcplb_nr_bounds, icplb_nr_bounds;
  55
  56 extern struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS];
  57 extern struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS];
  58 extern int first_switched_icplb;
  59 extern int first_switched_dcplb;
  60
  61 extern int nr_dcplb_miss[], nr_icplb_miss[], nr_icplb_supv_miss[];
  62 extern int nr_dcplb_prot[], nr_cplb_flush[];
  63
  64 #ifdef CONFIG_MPU
  65
  66 extern int first_mask_dcplb;
  67
  68 extern int page_mask_order;
  69 extern int page_mask_nelts;
  70
  71 extern unsigned long *current_rwx_mask[NR_CPUS];
  72
  73 extern void flush_switched_cplbs(unsigned int);
  74 extern void set_mask_dcplbs(unsigned long *, unsigned int);
  75
  76 extern void __noreturn panic_cplb_error(int seqstat, struct pt_regs *);
  77
  78 #endif /* CONFIG_MPU */
  79
  80 extern void bfin_icache_init(struct cplb_entry *icplb_tbl);
  81 extern void bfin_dcache_init(struct cplb_entry *icplb_tbl);
  82
  83 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  84 extern void generate_cplb_tables_all(void);
  85 extern void generate_cplb_tables_cpu(unsigned int cpu);
  86 #endif
  87 #endif