arch/riscv: Fix compiler argument for clang
[coreboot.git] / src / southbridge / intel / bd82x6x / smbus.c
blob0cb6d0029ea9ba9e4509969e5e200d7e25c7dd7e
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/device.h>
4 #include <device/path.h>
5 #include <device/smbus.h>
6 #include <device/pci.h>
7 #include <device/pci_ids.h>
8 #include <device/pci_ops.h>
9 #include <device/smbus_host.h>
10 #include <southbridge/intel/common/smbus_ops.h>
11 #include "pch.h"
13 static void pch_smbus_init(struct device *dev)
15 struct resource *res;
17 /* Enable clock gating */
18 pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)));
20 /* Set Receive Slave Address */
21 res = probe_resource(dev, PCI_BASE_ADDRESS_4);
22 if (res)
23 smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
26 static const char *smbus_acpi_name(const struct device *dev)
28 return "SBUS";
31 static struct device_operations smbus_ops = {
32 .read_resources = smbus_read_resources,
33 .set_resources = pci_dev_set_resources,
34 .enable_resources = pci_dev_enable_resources,
35 .scan_bus = scan_smbus,
36 .init = pch_smbus_init,
37 .ops_smbus_bus = &lops_smbus_bus,
38 .ops_pci = &pci_dev_ops_pci,
39 .acpi_name = smbus_acpi_name,
42 static const unsigned short pci_device_ids[] = { 0x1c22, 0x1e22, 0 };
44 static const struct pci_driver pch_smbus __pci_driver = {
45 .ops = &smbus_ops,
46 .vendor = PCI_VID_INTEL,
47 .devices = pci_device_ids,