src/soc/intel/alderlake/xhci.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/pci_type.h>
   4 #include <intelblocks/xhci.h>
   5 #include <soc/pci_devs.h>
   6
   7 /*
   8  * Information obtained from Intel doc# 630094, ADL-P PCH EDS Vol. 2,
   9  * as well as doc# 626817, ADL-P PCH EDS Vol. 1
  10  */
  11
  12 #define PCH_XHCI_USB2_PORT_STATUS_REG   0x480
  13 #define PCH_XHCI_USB3_PORT_STATUS_REG   0x540
  14 #define PCH_XHCI_USB2_PORT_NUM          10
  15 #define PCH_XHCI_USB3_PORT_NUM          4
  16
  17 #define TCSS_XHCI_USB2_PORT_STATUS_REG  0x480
  18 #define TCSS_XHCI_USB3_PORT_STATUS_REG  0x490
  19 #define TCSS_XHCI_USB2_PORT_NUM         0
  20 #define TCSS_XHCI_USB3_PORT_NUM         4
  21
  22 static const struct xhci_usb_info usb_info = {
  23         .usb2_port_status_reg = PCH_XHCI_USB2_PORT_STATUS_REG,
  24         .num_usb2_ports = PCH_XHCI_USB2_PORT_NUM,
  25         .usb3_port_status_reg = PCH_XHCI_USB3_PORT_STATUS_REG,
  26         .num_usb3_ports = PCH_XHCI_USB3_PORT_NUM,
  27 };
  28
  29 static const struct xhci_usb_info tcss_usb_info = {
  30         .usb2_port_status_reg = TCSS_XHCI_USB2_PORT_STATUS_REG,
  31         .num_usb2_ports = TCSS_XHCI_USB2_PORT_NUM,
  32         .usb3_port_status_reg = TCSS_XHCI_USB3_PORT_STATUS_REG,
  33         .num_usb3_ports = TCSS_XHCI_USB3_PORT_NUM,
  34 };
  35
  36 const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
  37 {
  38         if (xhci_dev == PCH_DEVFN_XHCI)
  39                 return &usb_info;
  40         else if (xhci_dev == SA_DEVFN_TCSS_XHCI)
  41                 return &tcss_usb_info;
  42
  43         return NULL;
  44 }