mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / mediatek / common / tps65132s.c
blobf93809a96bc3403503547a49e567b5b34c736f04
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <delay.h>
5 #include <device/i2c_simple.h>
6 #include <gpio.h>
7 #include <soc/i2c.h>
8 #include <soc/tps65132s.h>
10 static int tps65132s_reg_mask(unsigned int bus, uint8_t chip, uint8_t addr,
11 uint8_t val, uint8_t mask)
13 uint8_t msg = 0;
15 if (i2c_read_field(bus, chip, addr, &msg, 0xFF, 0) < 0) {
16 printk(BIOS_ERR, "%s: Failed to read i2c(%u): addr(%u)\n",
17 __func__, bus, addr);
18 return -1;
21 msg &= ~mask;
22 msg |= val;
24 return i2c_write_field(bus, chip, addr, msg, 0xFF, 0);
27 enum cb_err tps65132s_setup(const struct tps65132s_cfg *cfg)
29 bool write_to_eeprom = false;
30 u8 val;
31 int i;
33 gpio_output(cfg->en, 1);
34 gpio_output(cfg->sync, 1);
35 mdelay(10);
37 for (i = 0; i < cfg->setting_counts; i++) {
38 i2c_read_field(cfg->i2c_bus, PMIC_TPS65132_SLAVE,
39 cfg->settings[i].addr, &val, 0xFF, 0);
40 if (val != cfg->settings[i].val) {
41 if (tps65132s_reg_mask(cfg->i2c_bus, PMIC_TPS65132_SLAVE,
42 cfg->settings[i].addr,
43 cfg->settings[i].val,
44 cfg->settings[i].mask) < 0) {
45 printk(BIOS_ERR, "Failed to program TPS65132S at %x\n",
46 cfg->settings[i].addr);
47 return CB_ERR;
49 write_to_eeprom = true;
53 if (write_to_eeprom) {
54 if (tps65132s_reg_mask(cfg->i2c_bus, PMIC_TPS65132_SLAVE,
55 PMIC_TPS65132_CONTROL, 0x80, 0xFC) < 0)
56 return CB_ERR;
57 printk(BIOS_INFO, "Program TPS65132S EEPROM at first boot\n");
58 mdelay(50);
61 return CB_SUCCESS;