util/inteltool/gpio_groups.c

   1 /* inteltool - dump all registers on an Intel CPU + chipset based system */
   2 /* SPDX-License-Identifier: GPL-2.0-only */
   3
   4 #include <stdio.h>
   5 #include <stdlib.h>
   6 #include <stddef.h>
   7 #include <stdint.h>
   8 #include <assert.h>
   9 #include <inttypes.h>
  10 #include "inteltool.h"
  11 #include "pcr.h"
  12
  13 #include "gpio_names/apollolake.h"
  14 #include "gpio_names/cannonlake.h"
  15 #include "gpio_names/cannonlake_lp.h"
  16 #include "gpio_names/denverton.h"
  17 #include "gpio_names/geminilake.h"
  18 #include "gpio_names/icelake.h"
  19 #include "gpio_names/lewisburg.h"
  20 #include "gpio_names/sunrise.h"
  21 #include "gpio_names/tigerlake.h"
  22 #include "gpio_names/alderlake_h.h"
  23 #include "gpio_names/alderlake_p.h"
  24 #include "gpio_names/elkhartlake.h"
  25
  26 #define SBBAR_SIZE      (16 * MiB)
  27 #define PCR_PORT_SIZE   (64 * KiB)
  28
  29 static const char *decode_pad_mode(const struct gpio_group *const group,
  30                                    const size_t pad, const uint32_t dw0)
  31 {
  32         const size_t pad_mode = dw0 >> 10 & 7;
  33         const char *const pad_name =
  34                 group->pad_names[pad * group->func_count + pad_mode];
  35
  36         if (!pad_mode)
  37                 return pad_name[0] == '*' ? "*GPIO" : "GPIO";
  38         else if (pad_mode < group->func_count)
  39                 return group->pad_names[pad * group->func_count + pad_mode];
  40         else
  41                 return "RESERVED";
  42 }
  43
  44 static void print_gpio_group(const uint8_t pid, size_t pad_cfg,
  45                              const struct gpio_group *const group,
  46                              size_t pad_stepping)
  47 {
  48         size_t p;
  49
  50         printf("%s\n", group->display);
  51
  52         for (p = 0; p < group->pad_count; ++p, pad_cfg += pad_stepping) {
  53                 const uint32_t dw0 = read_pcr32(pid, pad_cfg);
  54                 const uint32_t dw1 = read_pcr32(pid, pad_cfg + 4);
  55                 const char *const pad_name =
  56                         group->pad_names[p * group->func_count];
  57
  58                 printf("0x%04zx: 0x%016"PRIx64" %-12s %-20s\n", pad_cfg,
  59                        (uint64_t)dw1 << 32 | dw0,
  60                        pad_name[0] == '*' ? &pad_name[1] : pad_name,
  61                        decode_pad_mode(group, p, dw0));
  62         }
  63 }
  64
  65 static void print_gpio_community(const struct gpio_community *const community,
  66                                  size_t pad_stepping)
  67 {
  68         size_t group, pad_count;
  69         size_t pad_cfg; /* offset in bytes under this communities PCR port */
  70
  71         printf("%s\n\nPCR Port ID: 0x%06zx\n\n",
  72                community->name, (size_t)community->pcr_port_id << 16);
  73
  74         for (group = 0, pad_count = 0; group < community->group_count; ++group)
  75                 pad_count += community->groups[group]->pad_count;
  76         assert(pad_count * 8 <= PCR_PORT_SIZE - 0x10);
  77
  78         pad_cfg = read_pcr32(community->pcr_port_id, 0x0c);
  79         if (pad_cfg + pad_count * 8 > PCR_PORT_SIZE) {
  80                 fprintf(stderr, "Bad Pad Base Address: 0x%08zx\n", pad_cfg);
  81                 return;
  82         }
  83
  84         for (group = 0; group < community->group_count; ++group) {
  85                 print_gpio_group(community->pcr_port_id,
  86                                  pad_cfg, community->groups[group],
  87                                  pad_stepping);
  88                 pad_cfg += community->groups[group]->pad_count * pad_stepping;
  89         }
  90 }
  91
  92 const struct gpio_community *const *get_gpio_communities(struct pci_dev *const sb,
  93                                                 size_t* community_count,
  94                                                 size_t* pad_stepping)
  95 {
  96         *pad_stepping = 8;
  97
  98         switch (sb->device_id) {
  99         case PCI_DEVICE_ID_INTEL_H110:
 100         case PCI_DEVICE_ID_INTEL_H170:
 101         case PCI_DEVICE_ID_INTEL_Z170:
 102         case PCI_DEVICE_ID_INTEL_Q170:
 103         case PCI_DEVICE_ID_INTEL_Q150:
 104         case PCI_DEVICE_ID_INTEL_B150:
 105         case PCI_DEVICE_ID_INTEL_C236:
 106         case PCI_DEVICE_ID_INTEL_C232:
 107         case PCI_DEVICE_ID_INTEL_QM170:
 108         case PCI_DEVICE_ID_INTEL_HM170:
 109         case PCI_DEVICE_ID_INTEL_CM236:
 110         case PCI_DEVICE_ID_INTEL_H270:
 111         case PCI_DEVICE_ID_INTEL_Z270:
 112         case PCI_DEVICE_ID_INTEL_Q270:
 113         case PCI_DEVICE_ID_INTEL_Q250:
 114         case PCI_DEVICE_ID_INTEL_B250:
 115         case PCI_DEVICE_ID_INTEL_Z370:
 116         case PCI_DEVICE_ID_INTEL_H310C:
 117         case PCI_DEVICE_ID_INTEL_X299:
 118                 *community_count = ARRAY_SIZE(sunrise_communities);
 119                 return sunrise_communities;
 120         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE:
 121         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL:
 122         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL:
 123         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL:
 124         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL:
 125         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL:
 126         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL:
 127         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE:
 128         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM:
 129         case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM:
 130                 *community_count = ARRAY_SIZE(sunrise_lp_communities);
 131                 return sunrise_lp_communities;
 132         case PCI_DEVICE_ID_INTEL_C621:
 133         case PCI_DEVICE_ID_INTEL_C622:
 134         case PCI_DEVICE_ID_INTEL_C624:
 135         case PCI_DEVICE_ID_INTEL_C625:
 136         case PCI_DEVICE_ID_INTEL_C626:
 137         case PCI_DEVICE_ID_INTEL_C627:
 138         case PCI_DEVICE_ID_INTEL_C628:
 139         case PCI_DEVICE_ID_INTEL_C629:
 140         case PCI_DEVICE_ID_INTEL_C621A:
 141         case PCI_DEVICE_ID_INTEL_C627A:
 142         case PCI_DEVICE_ID_INTEL_C629A:
 143         case PCI_DEVICE_ID_INTEL_C624_SUPER:
 144         case PCI_DEVICE_ID_INTEL_C627_SUPER_1:
 145         case PCI_DEVICE_ID_INTEL_C621_SUPER:
 146         case PCI_DEVICE_ID_INTEL_C627_SUPER_2:
 147         case PCI_DEVICE_ID_INTEL_C628_SUPER:
 148         case PCI_DEVICE_ID_INTEL_C621A_SUPER:
 149         case PCI_DEVICE_ID_INTEL_C627A_SUPER:
 150         case PCI_DEVICE_ID_INTEL_C629A_SUPER:
 151                 *community_count = ARRAY_SIZE(lewisburg_communities);
 152                 return lewisburg_communities;
 153         case PCI_DEVICE_ID_INTEL_DNV_LPC:
 154                 *community_count = ARRAY_SIZE(denverton_communities);
 155                 return denverton_communities;
 156         case PCI_DEVICE_ID_INTEL_APL_LPC:
 157                 *community_count = ARRAY_SIZE(apl_communities);
 158                 return apl_communities;
 159         case PCI_DEVICE_ID_INTEL_GLK_LPC:
 160                 *community_count = ARRAY_SIZE(glk_communities);
 161                 *pad_stepping = 16;
 162                 return glk_communities;
 163         case PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM:
 164         case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM:
 165         case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE:
 166                 *community_count = ARRAY_SIZE(cannonlake_pch_lp_communities);
 167                 *pad_stepping = 16;
 168                 return cannonlake_pch_lp_communities;
 169         case PCI_DEVICE_ID_INTEL_H310:
 170         case PCI_DEVICE_ID_INTEL_H370:
 171         case PCI_DEVICE_ID_INTEL_Z390:
 172         case PCI_DEVICE_ID_INTEL_Q370:
 173         case PCI_DEVICE_ID_INTEL_B360:
 174         case PCI_DEVICE_ID_INTEL_C246:
 175         case PCI_DEVICE_ID_INTEL_C242:
 176         case PCI_DEVICE_ID_INTEL_QM370:
 177         case PCI_DEVICE_ID_INTEL_HM370:
 178         case PCI_DEVICE_ID_INTEL_CM246:
 179                 *community_count = ARRAY_SIZE(cannonlake_pch_h_communities);
 180                 *pad_stepping = 16;
 181                 return cannonlake_pch_h_communities;
 182         case PCI_DEVICE_ID_INTEL_ICELAKE_LP_U:
 183                 *community_count = ARRAY_SIZE(icelake_pch_h_communities);
 184                 *pad_stepping = 16;
 185                 return icelake_pch_h_communities;
 186         case PCI_DEVICE_ID_INTEL_TIGERPOINT_U_SUPER:
 187         case PCI_DEVICE_ID_INTEL_TIGERPOINT_U_PREM:
 188         case PCI_DEVICE_ID_INTEL_TIGERPOINT_U_BASE:
 189         case PCI_DEVICE_ID_INTEL_TIGERPOINT_Y_SUPER:
 190         case PCI_DEVICE_ID_INTEL_TIGERPOINT_Y_PREM:
 191                 *community_count = ARRAY_SIZE(tigerlake_pch_lp_communities);
 192                 *pad_stepping = 16;
 193                 return tigerlake_pch_lp_communities;
 194         case PCI_DEVICE_ID_INTEL_Q570:
 195         case PCI_DEVICE_ID_INTEL_Z590:
 196         case PCI_DEVICE_ID_INTEL_H570:
 197         case PCI_DEVICE_ID_INTEL_B560:
 198         case PCI_DEVICE_ID_INTEL_H510:
 199         case PCI_DEVICE_ID_INTEL_WM590:
 200         case PCI_DEVICE_ID_INTEL_QM580:
 201         case PCI_DEVICE_ID_INTEL_HM570:
 202         case PCI_DEVICE_ID_INTEL_C252:
 203         case PCI_DEVICE_ID_INTEL_C256:
 204         case PCI_DEVICE_ID_INTEL_W580:
 205                 *community_count = ARRAY_SIZE(tigerlake_pch_h_communities);
 206                 *pad_stepping = 16;
 207                 return tigerlake_pch_h_communities;
 208         case PCI_DEVICE_ID_INTEL_H610:
 209         case PCI_DEVICE_ID_INTEL_B660:
 210         case PCI_DEVICE_ID_INTEL_H670:
 211         case PCI_DEVICE_ID_INTEL_Q670:
 212         case PCI_DEVICE_ID_INTEL_Z690:
 213         case PCI_DEVICE_ID_INTEL_W680:
 214         case PCI_DEVICE_ID_INTEL_W685:
 215         case PCI_DEVICE_ID_INTEL_WM690:
 216         case PCI_DEVICE_ID_INTEL_HM670:
 217         case PCI_DEVICE_ID_INTEL_WM790:
 218         case PCI_DEVICE_ID_INTEL_HM770:
 219                 *community_count = ARRAY_SIZE(alderlake_pch_h_communities);
 220                 *pad_stepping = 16;
 221                 return alderlake_pch_h_communities;
 222         case PCI_DEVICE_ID_INTEL_ADL_P:
 223         case PCI_DEVICE_ID_INTEL_ADL_M:
 224         case PCI_DEVICE_ID_INTEL_RPL_P:
 225                 *community_count = ARRAY_SIZE(alderlake_pch_p_communities);
 226                 *pad_stepping = 16;
 227                 return alderlake_pch_p_communities;
 228         case PCI_DEVICE_ID_INTEL_EHL:
 229                 *community_count = ARRAY_SIZE(elkhartlake_pch_communities);
 230                 *pad_stepping = 16;
 231                 return elkhartlake_pch_communities;
 232
 233         default:
 234                 return NULL;
 235         }
 236 }
 237
 238 void print_gpio_groups(struct pci_dev *const sb)
 239 {
 240         size_t community_count;
 241         const struct gpio_community *const *communities;
 242         size_t pad_stepping;
 243
 244         communities = get_gpio_communities(sb, &community_count, &pad_stepping);
 245
 246         if (!communities)
 247                 return;
 248
 249         pcr_init(sb);
 250
 251         printf("\n============= GPIOS =============\n\n");
 252
 253         for (; community_count; --community_count)
 254                 print_gpio_community(*communities++, pad_stepping);
 255 }