payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / mainboard / intel / minnow3 / devicetree.cb
blob76362e663e2bd1e5bca9831e19d8426692610491
1 chip soc/intel/apollolake
3 register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED"
4 register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
5 register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
6 register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
7 register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
8 register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
10 device cpu_cluster 0 on
11 device lapic 0 on end
12 end
14 device domain 0 on
15 device pci 00.0 on end # - Host Bridge
16 device pci 00.1 on end # - DPTF
17 device pci 00.2 on end # - NPK
18 device pci 02.0 on end # - Gen
19 device pci 03.0 on end # - Iunit
20 device pci 0d.0 on end # - P2SB
21 device pci 0d.1 on end # - PMC
22 device pci 0d.2 on end # - SPI
23 device pci 0d.3 on end # - Shared SRAM
24 device pci 0e.0 on end # - Audio
25 device pci 0f.0 on end # - CSE
26 device pci 11.0 on end # - ISH
27 device pci 12.0 on # - SATA
28 register "SataPortsEnable[0]" = "1"
29 register "SataPortsEnable[1]" = "1"
30 end
31 device pci 13.0 on end # - PCIe-A 0
32 device pci 13.2 on end # - Onboard Lan
33 device pci 13.3 on end # - PCIe-A 3
34 device pci 14.0 on end # - PCIe-B 0
35 device pci 14.1 on end # - Onboard M2 Slot(Wifi/BT)
36 device pci 15.0 on end # - XHCI
37 device pci 15.1 on end # - XDCI
38 device pci 16.0 on end # - I2C 0
39 device pci 16.1 on end # - I2C 1
40 device pci 16.2 on end # - I2C 2
41 device pci 16.3 on end # - I2C 3
42 device pci 17.0 on end # - I2C 4
43 device pci 17.1 on end # - I2C 5
44 device pci 17.2 on end # - I2C 6
45 device pci 17.3 on end # - I2C 7
46 device pci 18.0 on end # - UART 0
47 device pci 18.1 on end # - UART 1
48 device pci 18.2 on end # - UART 2
49 device pci 18.3 on end # - UART 3
50 device pci 19.0 on end # - SPI 0
51 device pci 19.1 on end # - SPI 1
52 device pci 19.2 on end # - SPI 2
53 device pci 1a.0 on end # - PWM
54 device pci 1b.0 on end # - SDCARD
55 device pci 1c.0 on end # - eMMC
56 device pci 1e.0 on end # - SDIO
57 device pci 1f.0 on end # - LPC
58 device pci 1f.1 on end # - SMBUS
59 end
60 end