payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / superio / smsc / lpc47m10x / superio.c
blobcb297a5b14cd68f6fcdd4ca2ddacb5b20f7e4122
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <device/device.h>
4 #include <device/pnp.h>
5 #include <superio/conf_mode.h>
6 #include <pc80/keyboard.h>
8 #include "lpc47m10x.h"
10 /**
11 * Initialize the specified Super I/O device.
13 * Devices other than COM ports and the keyboard controller are ignored.
14 * For COM ports, we configure the baud rate.
16 * @param dev Pointer to structure describing a Super I/O device.
18 static void lpc47m10x_init(struct device *dev)
20 if (!dev->enabled)
21 return;
23 switch (dev->path.pnp.device) {
24 case LPC47M10X2_KBC:
25 pc_keyboard_init(NO_AUX_DEVICE);
26 break;
30 static struct device_operations ops = {
31 .read_resources = pnp_read_resources,
32 .set_resources = pnp_set_resources,
33 .enable_resources = pnp_enable_resources,
34 .enable = pnp_alt_enable,
35 .init = lpc47m10x_init,
36 .ops_pnp_mode = &pnp_conf_mode_55_aa,
39 static struct pnp_info pnp_dev_info[] = {
40 { NULL, LPC47M10X2_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
41 { NULL, LPC47M10X2_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
42 { NULL, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
43 { NULL, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
44 { NULL, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
45 0x07ff, 0x07ff, },
46 { NULL, LPC47M10X2_PME, PNP_IO0, 0x0f80, },
49 /**
50 * Create device structures and allocate resources to devices specified in the
51 * pnp_dev_info array (above).
53 * @param dev Pointer to structure describing a Super I/O device.
55 static void enable_dev(struct device *dev)
57 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
60 struct chip_operations superio_smsc_lpc47m10x_ops = {
61 CHIP_NAME("SMSC LPC47M10x Super I/O")
62 .enable_dev = enable_dev