payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / superio / smsc / lpc47m15x / superio.c
blobe1e4883ba67a9cdf9b165053ebce023d81b54583
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /* RAM driver for the SMSC LPC47M15X Super I/O chip */
5 #include <device/device.h>
6 #include <device/pnp.h>
7 #include <superio/conf_mode.h>
8 #include <pc80/keyboard.h>
10 #include "lpc47m15x.h"
12 /* Forward declarations */
13 static void enable_dev(struct device *dev);
14 static void lpc47m15x_init(struct device *dev);
16 struct chip_operations superio_smsc_lpc47m15x_ops = {
17 CHIP_NAME("SMSC LPC47M15x/192/997 Super I/O")
18 .enable_dev = enable_dev
21 static struct device_operations ops = {
22 .read_resources = pnp_read_resources,
23 .set_resources = pnp_set_resources,
24 .enable_resources = pnp_enable_resources,
25 .enable = pnp_alt_enable,
26 .init = lpc47m15x_init,
27 .ops_pnp_mode = &pnp_conf_mode_55_aa,
30 static struct pnp_info pnp_dev_info[] = {
31 { NULL, LPC47M15X_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
32 { NULL, LPC47M15X_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
33 { NULL, LPC47M15X_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
34 { NULL, LPC47M15X_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
35 { NULL, LPC47M15X_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
36 0x07ff, 0x07ff, },
39 static void enable_dev(struct device *dev)
41 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
44 static void lpc47m15x_init(struct device *dev)
47 if (!dev->enabled)
48 return;
50 switch (dev->path.pnp.device) {
51 case LPC47M15X_KBC:
52 pc_keyboard_init(NO_AUX_DEVICE);
53 break;