soc/mediatek/mt8196: Add PMIC MT6373 driver
[coreboot.git] / src / mainboard / intel / adlrvp / mainboard.c
blobc02cbf9a58db5d47a2b8dfe5be39a8753824fcc4
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <cpu/cpu.h>
6 #include <cpu/intel/cpu_ids.h>
7 #include <device/device.h>
8 #include <drivers/intel/gma/opregion.h>
9 #include <ec/ec.h>
10 #include <fw_config.h>
11 #include <smbios.h>
12 #include <soc/gpio.h>
13 #include <stdint.h>
14 #include <stdio.h>
16 #include "board_id.h"
18 const char *smbios_system_sku(void)
20 static char sku_str[7] = "";
21 uint8_t sku_id = get_board_id();
23 snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id);
24 return sku_str;
27 static void mainboard_init(void *chip_info)
29 variant_configure_gpio_pads();
31 if (CONFIG(EC_GOOGLE_CHROMEEC))
32 mainboard_ec_init();
34 variant_devtree_update();
37 void __weak variant_devtree_update(void)
39 /* Override dev tree settings per board */
42 #if CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC)
43 static void add_fw_config_oem_string(const struct fw_config *config, void *arg)
45 struct smbios_type11 *t;
46 char buffer[64];
48 t = (struct smbios_type11 *)arg;
50 snprintf(buffer, sizeof(buffer), "%s-%s", config->field_name, config->option_name);
51 t->count = smbios_add_string(t->eos, buffer);
54 static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t)
56 fw_config_for_each_found(add_fw_config_oem_string, t);
58 #endif
60 static void mainboard_enable(struct device *dev)
62 #if CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC)
63 dev->ops->get_smbios_strings = mainboard_smbios_strings;
64 #endif
67 struct chip_operations mainboard_ops = {
68 .init = mainboard_init,
69 .enable_dev = mainboard_enable,
72 const char *mainboard_vbt_filename(void)
74 if (!CONFIG(CHROMEOS))
75 return "vbt.bin";
77 uint32_t cpu_id = cpu_get_cpuid();
78 uint8_t sku_id = get_board_id();
79 switch (sku_id) {
80 case ADL_P_LP5_1:
81 case ADL_P_LP5_2:
82 if (cpu_id == CPUID_RAPTORLAKE_J0)
83 return "vbt_adlrvp_rpl_lp5.bin";
84 return "vbt_adlrvp_lp5.bin";
85 case ADL_P_DDR5_1:
86 case ADL_P_DDR5_2:
87 return "vbt_adlrvp_ddr5.bin";
88 default:
89 return "vbt.bin";