mb/google/rauru: Implement regulator interface
[coreboot.git] / src / mainboard / intel / saddlebrook / Kconfig
blob5d16d228756b952b213d2a9db5a39d3df33d3702
1 ## SPDX-License-Identifier: GPL-2.0-only
3 if BOARD_INTEL_SKLSDLBRK
5 config BOARD_SPECIFIC_OPTIONS
6         def_bool y
7         select BOARD_ROMSIZE_KB_4096
8         select DRIVERS_UART
9         select HAVE_ACPI_RESUME
10         select HAVE_ACPI_TABLES
11         select HAVE_OPTION_TABLE
12         select SKYLAKE_SOC_PCH_H
13         select SOC_INTEL_SKYLAKE
14         select SUPERIO_NUVOTON_COMMON_COM_A
15         select SUPERIO_NUVOTON_NCT6776
16         select HAVE_CMOS_DEFAULT
17         select MAINBOARD_USES_IFD_GBE_REGION
19 config DISABLE_HECI1_AT_PRE_BOOT
20         default y
22 config MAINBOARD_DIR
23         default "intel/saddlebrook"
25 config MAINBOARD_PART_NUMBER
26         default "Skylake Saddle Brook"
28 config MAINBOARD_FAMILY
29         string
30         default "Intel_SaddleBrook"
32 config TPM_PIRQ
33         hex
34         default 0x18  # GPP_E0_IRQ
36 endif