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mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
[coreboot.git]
/
src
/
soc
/
cavium
/
cn81xx
/
chip.h
blob
68327f4751522782d151e98e381b26459cc50718
1
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __SOC_CAVIUM_CN81XX_CHIP_H
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#define __SOC_CAVIUM_CN81XX_CHIP_H
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struct
soc_cavium_cn81xx_config
{
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};
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#endif
/* __SOC_CAVIUM_CN81XX_CHIP_H */