mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
[coreboot.git] / src / soc / intel / apollolake / lockdown.c
blob5de4bdd2c13ba643d3cefbcb9e872945734e5353
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/mmio.h>
4 #include <intelblocks/cfg.h>
5 #include <intelblocks/pmclib.h>
6 #include <intelpch/lockdown.h>
7 #include <soc/pm.h>
9 static void pmc_lock_smi(void)
11 uint8_t *pmcbase;
13 pmcbase = pmc_mmio_regs();
15 setbits32(pmcbase + GEN_PMCON2, SMI_LOCK);
18 void soc_lockdown_config(int chipset_lockdown)
20 /* APL only supports CHIPSET_LOCKDOWN_COREBOOT */
21 if (CONFIG(SOC_INTEL_GEMINILAKE))
22 pmc_lock_smi();