1 ## SPDX-License-Identifier: GPL-2.0-only
2 ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL
),y
)
5 subdirs-y
+= ..
/..
/..
/cpu
/intel
/microcode
6 subdirs-y
+= ..
/..
/..
/cpu
/intel
/turbo
7 subdirs-y
+= ..
/..
/..
/cpu
/intel
/common
11 bootblock-y
+= ..
/..
/..
/cpu
/intel
/car
/non-evict
/cache_as_ram.S
12 bootblock-y
+= ..
/..
/..
/cpu
/intel
/car
/bootblock.c
13 bootblock-y
+= ..
/..
/..
/cpu
/x86
/early_reset.S
14 bootblock-y
+= bootblock
/bootblock.c
17 romstage-y
+= memmap.c
18 romstage-y
+= pmutil.c
36 ramstage-y
+= memmap.c
37 ramstage-y
+= northcluster.c
39 ramstage-y
+= perf_power.c
40 ramstage-y
+= pmutil.c
41 ramstage-y
+= ramstage.c
46 ramstage-y
+= southcluster.c
48 ramstage-
$(CONFIG_ELOG
) += elog.c
49 ramstage-
$(CONFIG_VGA_ROM_RUN
) += int15.c
51 ifeq ($(CONFIG_HAVE_REFCODE_BLOB
),y
)
52 ramstage-y
+= refcode.c
54 ramstage-y
+= modphy_table.c refcode_native.c
62 # Remove as ramstage gets fleshed out
63 ramstage-y
+= placeholders.c
65 postcar-y
+= ..
/..
/..
/cpu
/intel
/car
/non-evict
/exit_car.S
67 cpu_microcode_bins
+= 3rdparty
/blobs
/soc
/intel
/baytrail
/microcode.bin \
68 3rdparty
/intel-microcode
/intel-ucode
/06-37-09
70 CPPFLAGS_common
+= -Isrc
/soc
/intel
/baytrail
/include
72 ifeq ($(CONFIG_HAVE_MRC
),y
)
74 # Bay Trail MRC is an ELF file. Determine the entry address and first loadable
75 # section offset in the file. Subtract the offset from the entry address to
76 # determine the final location.
77 mrcelfoffset
= $(shell $(READELF_x86_32
) -S
-W
$(CONFIG_MRC_FILE
) | sed
-e
's/\[ /[0/' | awk
'$$3 ~ /PROGBITS/ { print "0x"$$5; exit }' )
78 mrcelfentry
= $(shell $(READELF_x86_32
) -h
-W
$(CONFIG_MRC_FILE
) | grep
'Entry point address' | awk
'{print $$NF }')
80 # Add memory reference code blob.
81 cbfs-files-y
+= mrc.bin
82 mrc.bin-file
:= $(call strip_quotes
,$(CONFIG_MRC_FILE
))
83 mrc.bin-position
:= $(shell printf
"0x%x" $$(( $(mrcelfentry
) - $(mrcelfoffset
) )) )