src/soc/intel/baytrail/hda.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 #include <console/console.h>
   3 #include <device/device.h>
   4 #include <device/pci.h>
   5 #include <device/pci_ids.h>
   6 #include <reg_script.h>
   7
   8 #include <soc/intel/common/hda_verb.h>
   9 #include <soc/iomap.h>
  10 #include <soc/iosf.h>
  11 #include <soc/pci_devs.h>
  12 #include <soc/ramstage.h>
  13
  14 static const struct reg_script init_ops[] = {
  15         /* Enable no snoop traffic. */
  16         REG_PCI_OR16(0x78, 1 << 11),
  17         /* Configure HDMI codec connection. */
  18         REG_PCI_OR32(0xc4, 1 << 1),
  19         REG_PCI_OR8(0x43, (1 << 3) | (1 << 6)),
  20         REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_PWRGT_CONTROL, 0xc0),
  21         REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_PWRGT_CONTROL, 0x00),
  22         /* Configure internal settings. */
  23         REG_PCI_OR32(0xc0, 0x7 << 21),
  24         REG_PCI_OR32(0xc4, (0x3 << 26) | (1 << 13) | (1 << 10)),
  25         REG_PCI_WRITE32(0xc8, 0x82a30000),
  26         REG_PCI_RMW32(0xd0, ~(1 << 31), 0x0),
  27         /* Disable docking. */
  28         REG_PCI_RMW8(0x4d, ~(1 << 7), 0),
  29         REG_SCRIPT_END,
  30 };
  31
  32 static const uint32_t hdmi_codec_verb_table[] = {
  33         /* coreboot specific header */
  34         0x80862882, /* vid did for hdmi codec */
  35         0x00000000, /* subsystem id */
  36         0x00000003, /* number of jacks */
  37
  38         /* pin widget 5 - port B */
  39         0x20471c10,
  40         0x20471d00,
  41         0x20471e56,
  42         0x20471f18,
  43
  44         /* pin widget 6 - port C */
  45         0x20571c20,
  46         0x20571d00,
  47         0x20571e56,
  48         0x20571f18,
  49
  50         /* pin widget 7 - port D */
  51         0x20671c30,
  52         0x20671d00,
  53         0x20671e56,
  54         0x20671f58,
  55 };
  56
  57 static void hda_init(struct device *dev)
  58 {
  59         struct resource *res;
  60         int codec_mask;
  61         int i;
  62         u8 *base;
  63
  64         reg_script_run_on_dev(dev, init_ops);
  65
  66         res = probe_resource(dev, PCI_BASE_ADDRESS_0);
  67         if (res == NULL)
  68                 return;
  69
  70         base = res2mmio(res, 0, 0);
  71         codec_mask = hda_codec_detect(base);
  72
  73         printk(BIOS_DEBUG, "codec mask = %x\n", codec_mask);
  74         if (!codec_mask)
  75                 return;
  76
  77         for (i = 3; i >= 0; i--) {
  78                 if (!((1 << i) & codec_mask))
  79                         continue;
  80                 hda_codec_init(base, i, sizeof(hdmi_codec_verb_table),
  81                                 hdmi_codec_verb_table);
  82         }
  83 }
  84
  85 static const struct device_operations device_ops = {
  86         .read_resources         = pci_dev_read_resources,
  87         .set_resources          = pci_dev_set_resources,
  88         .enable_resources       = pci_dev_enable_resources,
  89         .init                   = hda_init,
  90         .ops_pci                = &soc_pci_ops,
  91 };
  92
  93 static const struct pci_driver southcluster __pci_driver = {
  94         .ops            = &device_ops,
  95         .vendor         = PCI_VID_INTEL,
  96         .device         = HDA_DEVID,
  97 };