src/soc/intel/common/acpi/pch_clk.asl

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #define PCR_BIOS_BUFFEN 0x8080
   4
   5 Scope (\_SB)
   6 {
   7         /* MTL PCH CLK */
   8         Device (ICLK) {
   9                 Name (_HID, EISAID ("PNP0C02"))
  10                 Name (_UID, "SOCCLK")
  11
  12                 Method (_STA)
  13                 {
  14                         /*
  15                          * Device is present, enabled and decoding its resources
  16                          * and should not be shown in UI
  17                          */
  18                         Return (0x3)
  19                 }
  20
  21                 /*
  22                  * PCIe(100MHz) clock disable
  23                  * Arg0 - clock index
  24                  */
  25                 Method (CLKD, 1) {
  26                         \_SB.PCI0.PCRA (PID_ISCLK, PCR_BIOS_BUFFEN, Not (ShiftLeft (1, Arg0)))
  27                 }
  28
  29                 /*
  30                  * PCIe(100MHz) clock enable
  31                  * Arg0 - clock index
  32                  */
  33                 Method (CLKE, 1) {
  34                         \_SB.PCI0.PCRO (PID_ISCLK, PCR_BIOS_BUFFEN, (ShiftLeft (1, Arg0)))
  35                 }
  36         }
  37 }