src/soc/intel/denverton_ns/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 ifeq ($(CONFIG_SOC_INTEL_DENVERTON_NS),y)
   4
   5 subdirs-y += ../../../cpu/intel/microcode
   6 subdirs-y += ../../../cpu/intel/turbo
   7
   8 bootblock-y += bootblock/bootblock.c
   9 bootblock-y += spi.c
  10 bootblock-y += tsc_freq.c
  11 bootblock-$(CONFIG_CONSOLE_SERIAL) += bootblock/uart.c
  12 bootblock-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c
  13
  14 postcar-y += memmap.c
  15 postcar-y += spi.c
  16 postcar-y += tsc_freq.c
  17 postcar-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c
  18
  19 romstage-y += memmap.c
  20 romstage-y += reset.c
  21 romstage-y += ../../../cpu/intel/car/romstage.c
  22 romstage-y += romstage.c
  23 romstage-y += tsc_freq.c
  24 romstage-y += gpio_dnv.c
  25 romstage-y += gpio.c
  26 romstage-y += soc_util.c
  27 romstage-y += spi.c
  28 romstage-y += fiamux.c
  29 romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c
  30 romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
  31 romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
  32
  33 ramstage-y += memmap.c
  34 ramstage-y += systemagent.c
  35 ramstage-y += reset.c
  36 ramstage-y += chip.c
  37 ramstage-y += soc_util.c
  38 ramstage-y += uart.c
  39 ramstage-y += xhci.c
  40 ramstage-y += csme_ie_kt.c
  41 ramstage-y += lpc.c
  42 ramstage-y += pmc.c
  43 ramstage-y += npk.c
  44 ramstage-y += sata.c
  45 ramstage-y += cpu.c
  46 ramstage-y += tsc_freq.c
  47 ramstage-y += spi.c
  48 ramstage-y += fiamux.c
  49 ramstage-y += hob_mem.c
  50 ramstage-y += gpio.c
  51 ramstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c
  52 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
  53 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c
  54 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
  55 ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
  56 ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
  57
  58 smm-y += pmutil.c
  59 smm-y += soc_util.c
  60 smm-y += smihandler.c
  61 smm-y += tsc_freq.c
  62 smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
  63 smm-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c
  64
  65 verstage-y += memmap.c
  66 verstage-y += reset.c
  67 verstage-y += spi.c
  68 verstage-y += tsc_freq.c
  69 verstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c
  70
  71 CPPFLAGS_common += -I$(src)/soc/intel/denverton_ns/include
  72
  73 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5f-01
  74
  75 endif ## CONFIG_SOC_INTEL_DENVERTON_NS