ec/google/chromeec: Define ACPI_NOTIFY_CROS_EC_MKBP constant
[coreboot.git] / src / soc / intel / denverton_ns / uart_debug.c
blob7f804c7e8e15c01672e29a17215c1c696dc2f619
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <stdint.h>
4 #include <console/uart.h>
5 #include <device/pci_def.h>
6 #include <device/pci_ops.h>
7 #include <soc/uart.h>
9 #define MY_PCI_DEV(SEGBUS, DEV, FN) \
10 ((((SEGBUS)&0xFFF) << 20) | (((DEV)&0x1F) << 15) | (((FN)&0x07) << 12))
12 uintptr_t uart_platform_base(unsigned int idx)
14 return (uintptr_t)pci_io_read_config32(
15 MY_PCI_DEV(0, CONFIG_HSUART_DEV, idx),
16 PCI_BASE_ADDRESS_1) +
17 SIZE_OF_HSUART_RES * idx;