mb/google/fatcat: config GPP_F23 as ISH gpio pin
[coreboot.git] / src / soc / qualcomm / ipq806x / Kconfig
blob22a21559ea00ee008df945043c7a65b91969cf06
1 ## SPDX-License-Identifier: GPL-2.0-only
3 config SOC_QC_IPQ806X
4         bool
5         default n
6         select ARCH_BOOTBLOCK_ARMV7
7         select ARCH_VERSTAGE_ARMV7
8         select ARCH_ROMSTAGE_ARMV7
9         select ARCH_RAMSTAGE_ARMV7
10         select HAVE_UART_SPECIAL
11         select GENERIC_GPIO_LIB
12         select NO_MONOTONIC_TIMER
13 # clang creates larger binaries that may not fit
14         select CLANG_UNSUPPORTED if CHROMEOS
16 if SOC_QC_IPQ806X
18 config MEMLAYOUT_LD_FILE
19         string
20         default "src/soc/qualcomm/ipq806x/memlayout.ld"
22 config VBOOT
23         select VBOOT_STARTS_IN_BOOTBLOCK
24         select VBOOT_VBNV_FLASH
25         select VBOOT_SEPARATE_VERSTAGE
26         select VBOOT_RETURN_FROM_VERSTAGE
28 config SBL_BLOB
29         depends on USE_BLOBS
30         string "file name of the Qualcomm SBL blob"
31         default "3rdparty/blobs/cpu/qualcomm/ipq806x/uber-sbl.mbn"
32         help
33           The path and filename of the binary blob containing
34           ipq806x early initialization code, as supplied by the
35           vendor.
37 endif