src/include/cpu/x86/smm.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef CPU_X86_SMM_H
   4 #define CPU_X86_SMM_H
   5
   6 #include <arch/cpu.h>
   7 #include <commonlib/region.h>
   8 #include <device/pci_type.h>
   9 #include <device/resource.h>
  10 #include <types.h>
  11
  12 #define SMM_DEFAULT_BASE 0x30000
  13 #define SMM_DEFAULT_SIZE 0x10000
  14
  15 /* used only by C programs so far */
  16 #define SMM_BASE 0xa0000
  17
  18 #define SMM_ENTRY_OFFSET 0x8000
  19 #define SMM_SAVE_STATE_BEGIN(x) (SMM_ENTRY_OFFSET + (x))
  20
  21 #define APM_CNT         0xb2
  22 #define APM_CNT_NOOP_SMI        0x00
  23 #define APM_CNT_ACPI_DISABLE    0x1e
  24 #define APM_CNT_ACPI_ENABLE     0xe1
  25 #define APM_CNT_ROUTE_ALL_XHCI  0xca
  26 #define APM_CNT_FINALIZE        0xcb
  27 #define APM_CNT_LEGACY          0xcc
  28 #define APM_CNT_MBI_UPDATE      0xeb
  29 #define APM_CNT_SMMINFO         0xec
  30 #define APM_CNT_SMMSTORE        0xed
  31 #define APM_CNT_ELOG_GSMI       0xef
  32 #define APM_STS         0xb3
  33
  34 #define SMM_PCI_RESOURCE_STORE_NUM_RESOURCES 6
  35
  36 /* Send cmd to APM_CNT with HAVE_SMI_HANDLER checking. */
  37 int apm_control(u8 cmd);
  38 u8 apm_get_apmc(void);
  39
  40 void io_trap_handler(int smif);
  41 int mainboard_io_trap_handler(int smif);
  42
  43 void southbridge_smi_set_eos(void);
  44
  45 void global_smi_enable(void);
  46 void global_smi_enable_no_pwrbtn(void);
  47
  48 void cpu_smi_handler(void);
  49 void northbridge_smi_handler(void);
  50 void southbridge_smi_handler(void);
  51
  52 void mainboard_smi_gpi(u32 gpi_sts);
  53 int  mainboard_smi_apmc(u8 data);
  54 void mainboard_smi_sleep(u8 slp_typ);
  55 void mainboard_smi_finalize(void);
  56 int mainboard_set_smm_log_level(void);
  57
  58 void smm_soc_early_init(void);
  59 void smm_soc_exit(void);
  60
  61 /* This is the SMM handler. */
  62 extern unsigned char _binary_smm_start[];
  63 extern unsigned char _binary_smm_end[];
  64
  65 struct smm_pci_resource_info {
  66         pci_devfn_t pci_addr;
  67         uint16_t class_device;
  68         uint8_t class_prog;
  69         struct resource resources[SMM_PCI_RESOURCE_STORE_NUM_RESOURCES];
  70 };
  71
  72 struct smm_runtime {
  73         u32 smbase;
  74         u32 smm_size;
  75         u32 save_state_size;
  76         u32 num_cpus;
  77         u32 gnvs_ptr;
  78         u32 cbmemc_size;
  79         void *cbmemc;
  80 #if CONFIG(SMM_PCI_RESOURCE_STORE)
  81         struct smm_pci_resource_info pci_resources[CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS];
  82 #endif
  83         uintptr_t save_state_top[CONFIG_MAX_CPUS];
  84         int smm_log_level;
  85 } __packed;
  86
  87 struct smm_module_params {
  88         size_t cpu;
  89         /* A canary value that has been placed at the end of the stack.
  90          * If (uintptr_t)canary != *canary then a stack overflow has occurred.
  91          */
  92         const uintptr_t *canary;
  93 };
  94
  95 /* These parameters are used by the SMM stub code. A pointer to the params
  96  * is also passed to the C-base handler. */
  97 struct smm_stub_params {
  98         u32 stack_size;
  99         u32 stack_top;
 100         u32 c_handler;
 101         u32 fxsave_area;
 102         u32 fxsave_area_size;
 103         /* The apic_id_to_cpu provides a mapping from APIC id to CPU number.
 104          * The CPU number is indicated by the index into the array by matching
 105          * the default APIC id and value at the index. The stub loader
 106          * initializes this array with a 1:1 mapping. If the APIC ids are not
 107          * contiguous like the 1:1 mapping it is up to the caller of the stub
 108          * loader to adjust this mapping. */
 109         u16 apic_id_to_cpu[CONFIG_MAX_CPUS];
 110         /* STM's 32bit entry into SMI handler */
 111         u32 start32_offset;
 112 } __packed;
 113
 114 /* smm_handler_t is called with arg of smm_module_params pointer. */
 115 typedef asmlinkage void (*smm_handler_t)(void *);
 116
 117 /* SMM Runtime helpers. */
 118 #if ENV_SMM
 119 extern struct global_nvs *gnvs;
 120 #endif
 121
 122 /* Entry point for SMM modules. */
 123 asmlinkage void smm_handler_start(void *params);
 124
 125 /* Retrieve SMM save state for a given CPU. WARNING: This does not take into
 126  * account CPUs which are configured to not save their state to RAM. */
 127 void *smm_get_save_state(int cpu);
 128
 129 /* Returns true if the region overlaps with the SMM */
 130 bool smm_region_overlaps_handler(const struct region *r);
 131
 132 /* Returns true if the memory pointed to overlaps with SMM reserved memory. */
 133 static inline bool smm_points_to_smram(const void *ptr, const size_t len)
 134 {
 135         const struct region r = {(uintptr_t)ptr, len};
 136
 137         return smm_region_overlaps_handler(&r);
 138 }
 139
 140 /* SMM Module Loading API */
 141
 142 /* The smm_loader_params structure provides direction to the SMM loader:
 143  * - num_cpus - number of concurrent cpus in handler needing stack
 144  *                           optional for setting up relocation handler.
 145  * - cpu_save_state_size - the SMM save state size per cpu
 146  * - num_concurrent_save_states - number of concurrent cpus needing save state
 147  *                                space
 148  * - handler - optional handler to call. Only used during SMM relocation setup.
 149  * - runtime - this field is a result only. The SMM runtime location is filled
 150  *             into this field so the code doing the loading can manipulate the
 151  *             runtime's assumptions. e.g. updating the APIC id to CPU map to
 152  *             handle sparse APIC id space.
 153  */
 154 struct smm_loader_params {
 155         size_t num_cpus;
 156
 157         size_t cpu_save_state_size;
 158         size_t num_concurrent_save_states;
 159
 160         smm_handler_t handler;
 161
 162         struct smm_stub_params *stub_params;
 163 };
 164
 165 /* All of these return 0 on success, < 0 on failure. */
 166 int smm_setup_stack(const uintptr_t perm_smbase, const size_t perm_smram_size,
 167                     const unsigned int total_cpus, const size_t stack_size);
 168 int smm_setup_relocation_handler(struct smm_loader_params *params);
 169 int smm_load_module(uintptr_t smram_base, size_t smram_size, struct smm_loader_params *params);
 170
 171 u32 smm_get_cpu_smbase(unsigned int cpu_num);
 172
 173 /* Backup and restore default SMM region. */
 174 void *backup_default_smm_area(void);
 175 void restore_default_smm_area(void *smm_save_area);
 176
 177 /*
 178  * Fills in the arguments for the entire SMM region covered by chipset
 179  * protections. e.g. TSEG.
 180  */
 181 void smm_region(uintptr_t *start, size_t *size);
 182
 183 static inline void aseg_region(uintptr_t *start, size_t *size)
 184 {
 185         *start = SMM_BASE;
 186         *size = SMM_DEFAULT_SIZE; /* SMM_CODE_SEGMENT_SIZE ? */
 187 }
 188
 189 enum {
 190         /* SMM handler area. */
 191         SMM_SUBREGION_HANDLER,
 192         /* SMM cache region. */
 193         SMM_SUBREGION_CACHE,
 194         /* Chipset specific area. */
 195         SMM_SUBREGION_CHIPSET,
 196         /* Total sub regions supported. */
 197         SMM_SUBREGION_NUM,
 198 };
 199
 200 /* Fills in the start and size for the requested SMM subregion. Returns
 201  * 0 on success, < 0 on failure. */
 202 int smm_subregion(int sub, uintptr_t *start, size_t *size);
 203
 204 /* Print the SMM memory layout on console. */
 205 void smm_list_regions(void);
 206
 207 #define SMM_REVISION_OFFSET_FROM_TOP (0x8000 - 0x7efc)
 208 /* Return the SMM save state revision. The revision can be fetched from the smm savestate
 209    which is always at the same offset downward from the top of the save state. */
 210 uint32_t smm_revision(void);
 211 /* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2).
 212    On AMD systems it is sometimes configurable. */
 213 uint16_t pm_acpi_smi_cmd_port(void);
 214
 215 const volatile struct smm_pci_resource_info *smm_get_pci_resource_store(void);
 216
 217 void smm_pci_get_stored_resources(const volatile struct smm_pci_resource_info **out_slots,
 218                                   size_t *out_size);
 219 /* Weak handler function to store PCI BARs. */
 220 void smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, size_t size);
 221 /* Helper function to fill BARs from an array of device pointers. */
 222 bool smm_pci_resource_store_fill_resources(struct smm_pci_resource_info *slots, size_t num_slots,
 223                                            const struct device **devices, size_t num_devices);
 224
 225 void smm_pci_resource_store_init(struct smm_runtime *smm_runtime);
 226
 227 #endif /* CPU_X86_SMM_H */