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soc/intel/pantherlake: Enable CPU feature programming in coreboot
[coreboot.git]
/
.editorconfig
blob
f270d4cdaa8da1ab2c069cad2f88eac52e269489
1
# EditorConfig: https://EditorConfig.org
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root = true
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[*]
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indent_style = tab
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tab_width = 8
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charset = utf-8
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insert_final_newline = true
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end_of_line = lf
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trim_trailing_whitespace = true
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[*.sh]
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indent_style = space
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indent_size = 2