soc/amd/sabrina,vc/amd/fsp/sabrina: Add UART support for Sabrina
[coreboot.git] / tests / lib / dimm_info_util-test.c
blobcecbacbb85934b0f270cdef396ed3b272b63a611
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <dimm_info_util.h>
4 #include <spd.h>
5 #include <tests/test.h>
7 #define MAX_ALLOWED_MODULE_TYPE 3
9 static void test_smbios_bus_width_to_spd_width_parametrized(smbios_memory_type ddr_type)
11 /* Non-ECC variants */
12 assert_int_equal(MEMORY_BUS_WIDTH_64, smbios_bus_width_to_spd_width(ddr_type, 64, 64));
13 assert_int_equal(MEMORY_BUS_WIDTH_32, smbios_bus_width_to_spd_width(ddr_type, 32, 32));
14 assert_int_equal(MEMORY_BUS_WIDTH_16, smbios_bus_width_to_spd_width(ddr_type, 16, 16));
15 assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(ddr_type, 8, 8));
16 /* Incorrect data width. Fallback to 8-bit */
17 assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(ddr_type, 15, 15));
19 /* ECC variants */
20 uint8_t extension_8bits = SPD_ECC_8BIT;
21 if (ddr_type == MEMORY_TYPE_DDR5 || ddr_type == MEMORY_TYPE_LPDDR5)
22 extension_8bits = SPD_ECC_8BIT_LP5_DDR5;
24 assert_int_equal(MEMORY_BUS_WIDTH_64 | extension_8bits,
25 smbios_bus_width_to_spd_width(ddr_type, 64 + 8, 64));
26 assert_int_equal(MEMORY_BUS_WIDTH_32 | extension_8bits,
27 smbios_bus_width_to_spd_width(ddr_type, 32 + 8, 32));
28 assert_int_equal(MEMORY_BUS_WIDTH_16 | extension_8bits,
29 smbios_bus_width_to_spd_width(ddr_type, 16 + 8, 16));
30 assert_int_equal(MEMORY_BUS_WIDTH_8 | extension_8bits,
31 smbios_bus_width_to_spd_width(ddr_type, 8 + 8, 8));
32 /* Incorrect data width. Fallback to 8-bit */
33 assert_int_equal(MEMORY_BUS_WIDTH_8 | extension_8bits,
34 smbios_bus_width_to_spd_width(ddr_type, 15 + 8, 15));
37 static void test_smbios_bus_width_to_spd_width(void **state)
39 smbios_memory_type memory_type[] = {
40 MEMORY_TYPE_DDR2, MEMORY_TYPE_DDR3, MEMORY_TYPE_DDR4, MEMORY_TYPE_DDR5,
41 MEMORY_TYPE_LPDDR3, MEMORY_TYPE_LPDDR4, MEMORY_TYPE_LPDDR5,
44 for (int i = 0; i < ARRAY_SIZE(memory_type); i++) {
45 print_message("test_smbios_bus_width_to_spd_width_parametrized(%d)\n",
46 memory_type[i]);
47 test_smbios_bus_width_to_spd_width_parametrized(memory_type[i]);
51 static void test_smbios_memory_size_to_mib(void **state)
53 uint32_t extended_size;
54 uint16_t memory_size;
56 /* Unknown memory size */
57 assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0));
58 assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0xFFFF));
59 assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 87642));
61 /* 32GiB - 1MiB */
62 extended_size = 0;
63 assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
64 extended_size = 0xFFFFFFFF;
65 assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
66 extended_size = 0xDEDE6666;
67 assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
69 /* Memory size in KiB when MSB is flipped */
70 memory_size = 0x0 & 0x8000; /* Zero bytes */
71 assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0));
72 assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
73 assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 2345568));
74 memory_size = (31 * KiB) | 0x8000;
75 assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0));
76 assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
77 assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 72594344));
79 /* Value in MiB Only when memory size is not 0xFFFF and 0x7FFF and MSB is not set */
80 memory_size = 32766; /* value in MiB */
81 assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0));
82 assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
83 assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 694735));
86 static void test_smbios_form_factor_to_spd_mod_type_ddr(smbios_memory_type memory_type)
88 const smbios_memory_form_factor undefined_factors[] = {
89 MEMORY_FORMFACTOR_OTHER, MEMORY_FORMFACTOR_UNKNOWN,
90 MEMORY_FORMFACTOR_SIMM, MEMORY_FORMFACTOR_SIP,
91 MEMORY_FORMFACTOR_CHIP, MEMORY_FORMFACTOR_DIP,
92 MEMORY_FORMFACTOR_ZIP, MEMORY_FORMFACTOR_PROPRIETARY_CARD,
93 MEMORY_FORMFACTOR_TSOP, MEMORY_FORMFACTOR_ROC,
94 MEMORY_FORMFACTOR_SRIMM, MEMORY_FORMFACTOR_FBDIMM,
95 MEMORY_FORMFACTOR_DIE,
97 for (int i = 0; i < ARRAY_SIZE(undefined_factors); ++i) {
98 assert_int_equal(SPD_UNDEFINED, smbios_form_factor_to_spd_mod_type(
99 memory_type, undefined_factors[i]));
103 static void test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized(
104 smbios_memory_type memory_type, const LargestIntegralType udimm_allowed[],
105 const LargestIntegralType rdimm_allowed[], LargestIntegralType expected_module_type)
107 print_message("%s(%d)\n", __func__, memory_type);
109 assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_DIMM),
110 udimm_allowed, MAX_ALLOWED_MODULE_TYPE);
112 assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_RIMM),
113 rdimm_allowed, MAX_ALLOWED_MODULE_TYPE);
115 assert_int_equal(expected_module_type, smbios_form_factor_to_spd_mod_type(
116 memory_type, MEMORY_FORMFACTOR_SODIMM));
118 test_smbios_form_factor_to_spd_mod_type_ddr(memory_type);
121 static void test_smbios_form_factor_to_spd_mod_type_lpddrx(smbios_memory_type memory_type)
123 print_message("%s(%d)\n", __func__, memory_type);
124 /* Form factors defined in coreboot */
125 assert_int_equal(LPX_SPD_NONDIMM, smbios_form_factor_to_spd_mod_type(
126 memory_type, MEMORY_FORMFACTOR_ROC));
129 static void test_smbios_form_factor_to_spd_mod_type(void **state)
131 const struct smbios_form_factor_test_info_ddrx {
132 smbios_memory_type memory_type;
133 const LargestIntegralType udimm_allowed[MAX_ALLOWED_MODULE_TYPE];
134 const LargestIntegralType rdimm_allowed[MAX_ALLOWED_MODULE_TYPE];
135 LargestIntegralType expected_module_type;
136 } ddrx_info[] = {
138 .memory_type = MEMORY_TYPE_DDR2,
139 .udimm_allowed = {DDR2_SPD_UDIMM, DDR2_SPD_MICRO_DIMM,
140 DDR2_SPD_MINI_UDIMM},
141 .rdimm_allowed = {DDR2_SPD_RDIMM, DDR2_SPD_MINI_RDIMM},
142 .expected_module_type = DDR2_SPD_SODIMM,
145 .memory_type = MEMORY_TYPE_DDR3,
146 .udimm_allowed = {DDR3_SPD_UDIMM, DDR3_SPD_MICRO_DIMM,
147 DDR3_SPD_MINI_UDIMM},
148 .rdimm_allowed = {DDR3_SPD_RDIMM, DDR3_SPD_MINI_RDIMM},
149 .expected_module_type = DDR3_SPD_SODIMM,
152 .memory_type = MEMORY_TYPE_DDR4,
153 .udimm_allowed = {DDR4_SPD_UDIMM, DDR4_SPD_MINI_UDIMM},
154 .rdimm_allowed = {DDR4_SPD_RDIMM, DDR4_SPD_MINI_RDIMM},
155 .expected_module_type = DDR4_SPD_SODIMM,
157 {.memory_type = MEMORY_TYPE_DDR5,
158 .udimm_allowed = {DDR5_SPD_UDIMM, DDR5_SPD_MINI_UDIMM},
159 .rdimm_allowed = {DDR5_SPD_RDIMM, DDR5_SPD_MINI_RDIMM},
160 .expected_module_type = DDR5_SPD_SODIMM},
163 /* Test for DDRx DIMM Modules */
164 for (int i = 0; i < ARRAY_SIZE(ddrx_info); i++)
165 test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized(
166 ddrx_info[i].memory_type, ddrx_info[i].udimm_allowed,
167 ddrx_info[i].rdimm_allowed, ddrx_info[i].expected_module_type);
169 smbios_memory_type lpddrx_memory_type[] = {
170 MEMORY_TYPE_LPDDR3,
171 MEMORY_TYPE_LPDDR4,
172 MEMORY_TYPE_LPDDR5,
175 /* Test for Lpddrx DIMM Modules */
176 for (int i = 0; i < ARRAY_SIZE(lpddrx_memory_type); i++)
177 test_smbios_form_factor_to_spd_mod_type_lpddrx(lpddrx_memory_type[i]);
180 int main(void)
182 const struct CMUnitTest tests[] = {
183 cmocka_unit_test(test_smbios_bus_width_to_spd_width),
184 cmocka_unit_test(test_smbios_memory_size_to_mib),
185 cmocka_unit_test(test_smbios_form_factor_to_spd_mod_type),
188 return cb_run_group_tests(tests, NULL, NULL);