| commit | 4bcca66f2db42d9c7a463f49511d48126677c670 | |
| author | Subrata Banik <subratabanik@google.com> | |
| Fri, 10 Jan 2025 10:38:54 +0000 (10 16:08 +0530) | ||
| committer | Subrata Banik <subratabanik@google.com> | |
| Tue, 14 Jan 2025 07:39:45 +0000 (14 07:39 +0000) | ||
| tree | 53dbefccbd552b1dbb8d3cd3a5e3d8d003af4a60 | treesnapshot (tar.gz zip) |
| parent | 0529c6d033ad7b4da7a4b8ee6325e64644bf6520 | commitdiff |
soc/intel/pantherlake: Refactor FSP log level control
Refactor the FSP log level control by introducing a helper function
`fsp_set_debug_level()` to set the serial and MRC debug levels.
This change improves code readability and maintainability by separating
the log level setting logic from the main control flow. It also adds a
check to ensure the configured log levels are valid.
Change-Id: I6efd6a0ea006b4013dce1c8849b7dbbd4ea5e1dc
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85934
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Refactor the FSP log level control by introducing a helper function
`fsp_set_debug_level()` to set the serial and MRC debug levels.
This change improves code readability and maintainability by separating
the log level setting logic from the main control flow. It also adds a
check to ensure the configured log levels are valid.
Change-Id: I6efd6a0ea006b4013dce1c8849b7dbbd4ea5e1dc
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85934
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
| src/soc/intel/pantherlake/romstage/fsp_params.c | diffblobblamehistory |