soc/intel/xeon_sp: lock MSR_PPIN_CTL at BS_PAYLOAD_LOAD

soc/intel/xeon_sp: lock MSR_PPIN_CTL at BS_PAYLOAD_LOAD

MSR_PPIN_CTL may need to be read more than once, so lock PPIN CTL
MSR at a late BS_PAYLOAD_LOAD boot state.

This MSR is in platform scope and must only be locked once on each
socket. Add a spinlock to do so.

Tested=On OCP Craterlake single socket, rdmsr -a 0x04e shows 1.

Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Change-Id: I8deb086339267cf36e41e16f189e1378f20b82f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>