| commit | d7846fb2ff07d3e435189e46a2d207be45245ce9 | |
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | |
| Thu, 14 Nov 2024 10:09:49 +0000 (14 11:09 +0100) | ||
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | |
| Tue, 19 Nov 2024 11:51:13 +0000 (19 11:51 +0000) | ||
| tree | 344b117b086a9d69279468c75df03ca0bb503426 | treesnapshot (tar.gz zip) |
| parent | 5ca1683b324145e791350643eec389f2cd940b40 | commitdiff |
soc/intel/xeon_sp: Fix VTD address
On 1st and 2nd gen Xeon-SP the VTD PCI device is not at DEVFN 0.0.
Fix the DEVFN address and thus fix an assertion in vtd_probe_bar_size().
Change-Id: Ie879e95436af92fca1fee49135938ca2b005d579
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
On 1st and 2nd gen Xeon-SP the VTD PCI device is not at DEVFN 0.0.
Fix the DEVFN address and thus fix an assertion in vtd_probe_bar_size().
Change-Id: Ie879e95436af92fca1fee49135938ca2b005d579
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
| src/soc/intel/xeon_sp/chip_gen1.c | diffblobblamehistory | |
| src/soc/intel/xeon_sp/spr/ioat.c | diffblobblamehistory |