| commit | e19f40377078375ed85f27e5028ed17d7857d6ca | |
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | |
| Thu, 10 Nov 2022 08:46:17 +0000 (10 09:46 +0100) | ||
| committer | Martin L Roth <gaumless@gmail.com> | |
| Thu, 24 Nov 2022 06:01:58 +0000 (24 06:01 +0000) | ||
| tree | 076e547950025dd4af6cec4b07f954008c70e723 | treesnapshot (tar.gz zip) |
| parent | 155cf5cd2ee844e9fb86f0f2487ccca65e560f33 | commitdiff |
mb/siemens/mc_ehl2: Enable Marvell PHY interrupt
On this mainboard Marvell PHY INTn is routed to LED[2] pin.
Change-Id: I28a78afdcf0599bb998f906ce8056a0586e24f33
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69434
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
On this mainboard Marvell PHY INTn is routed to LED[2] pin.
Change-Id: I28a78afdcf0599bb998f906ce8056a0586e24f33
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69434
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | diffblobblamehistory |