From 5c1c7b6904096ae1550be9a3cf800d2b7fb07433 Mon Sep 17 00:00:00 2001
From: Fred Reitberger <reitbergerfred@gmail.com>
Date: Fri, 12 May 2023 12:53:52 -0400
Subject: [PATCH] soc/amd/phoenix/Kconfig: Update default soft fuse bits

Set the default soft fuse bits to the recommended values

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I2354aefe90a08eaef95a68926806d11a9118c3de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75183
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/soc/amd/phoenix/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig
index f1b9e638d7..4efe5c93d7 100644
--- a/src/soc/amd/phoenix/Kconfig
+++ b/src/soc/amd/phoenix/Kconfig
@@ -430,7 +430,7 @@ config SPL_RW_AB_TABLE_FILE
 
 config PSP_SOFTFUSE_BITS
 	string "PSP Soft Fuse bits to enable"
-	default "34 28 6"
+	default "36 28 6"
 	help
 	  Space separated list of Soft Fuse bits to enable.
 	  Bit 0:  Enable secure debug (Set by PSP_UNLOCK_SECURE_DEBUG)
-- 
2.11.4.GIT