src/mainboard/acer/aspire_vn7_572g/gpio_early.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <gpio.h>
   4 #include "include/gpio.h"
   5
   6 /* Early pad configuration */
   7 static const struct pad_config early_gpio_table[] = {
   8         // GPIO (ISH_GP2) = DGPU_PRESENT
   9         PAD_CFG_GPI_TRIG_OWN(GPP_A20, NONE, DEEP, OFF, ACPI),
  10         // GPIO (VRALERT#) <= DGPU_PWROK
  11         PAD_CFG_GPI_TRIG_OWN(GPP_B2, NONE, DEEP, OFF, ACPI),
  12         // GPIO (CPU_GP3) => DGPU_HOLD_RST#
  13         PAD_CFG_GPO(GPP_B4, 1, DEEP),
  14         // GPIO (GSPI1_MISO) => DGPU_PWR_EN#
  15         PAD_CFG_TERM_GPO(GPP_B21, 1, DN_20K, DEEP),
  16         // UART2_RXD = LPSS_UART2_RXD
  17         PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
  18         // UART2_TXD = LPSS_UART2_TXD
  19         PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
  20         // SATALED# = SATA_LED#
  21         PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
  22 };
  23
  24 void mainboard_config_stage_gpios(void)
  25 {
  26         gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
  27 }